CVA6-CHERI full micro-architectural coverage specification
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- Dominant language
- SystemVerilog
- Stars
- 38
- Forks
- 21
- Avg merge
- 2d 23h
- Merged PRs (30d)
- 14
Description
Follow on from #61 after creating ALU micro-architectural coverage example, we now need to expand this to cover all interesting microarchitectural features.
Contributor guide
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Read issue #61 and the existing ALU micro-architectural coverage example first. Identify the remaining interesting CVA6-CHERI microarchitectural features that need coverage and define the full specification for them. Done means the specification covers all relevant features beyond the ALU example.
Written by the indexing model from the issue text.
Assessment
- Domain
- testing-qa
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Quiet
- Clarity
- Needs clarification
- Newbie friendliness
- 35/100