Verification Strategy details
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@martin-velay is already working on this.
Since Dec 12, 2025.
- Dominant language
- SystemVerilog
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- 38
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- 21
- Avg merge
- 2d 23h
- Merged PRs (30d)
- 14
Description
Take the verification strategy document and do one level more of detail on how to implement it. Give more details about TB architecture and more in general DV. The vPlan and metric choices will also have some implications on the DV strategy document.
> [!NOTE]
> This won't be the final version as the final vPlan is required for that.
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