lowRISC / lowRISC/lowrisc-fpga
Increase Block RAM in LowRISC 0.2
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- Dominant language
- C
- Stars
- 56
- Forks
- 16
- PR merge metrics
- No merged PRs in 30d
Description
What is the correct procedure to increase the block ram in lowrisc version 0.2 to run large bare metal applications?
I changed `localparam BRAM_ADDR_WIDTH = 16;` to `localparam BRAM_ADDR_WIDTH = 17;` Everything compiles and I can see FPGA utilization has increased. When I compile the bare metal program I get this error in bmm2mmi
```
WARNING: [Vivado 12-180] No cells matched 'ram_reg_15'.
ERROR: [Common 17-55] 'get_property' expects at least one object.
Resolution: If [get_] was used to populate the object, check to make sure this command returns at least one valid object.
```
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by reviewing the BRAM_ADDR_WIDTH change and the bmm2mmi error, then reproduce the bare metal compilation flow for LowRISC 0.2. Done means the increased block RAM is recognized by the generated memory files and a large bare metal application compiles without the Vivado missing-cell error.
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Assessment
- Tech stack
- c
- Domain
- embedded-iot
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100