Defining the boot process for bare metal?

Per the 1.91 Privileged Specification, I found that the behavior of the PC on reset is to be set to "an implementation-defined" default value (see section 3.3). What does this mean for the lowRISC chip?

I checked out the latest source code and built the Hello UART example. Closer inspection of the ELF header revealed the entry point to be 0x40000000 (supported by the linker script for release 0.5).

I went back an earlier release (0.2) and the entry point of the same hello baremetal program was 0x100 (supported by the linker script).

• What is the PC set to on reset for the 0.2 and 0.5 releases? Has it changed over time? Is it planned to change again?
• Is there a fixed ROM loader that jumps to these payload entry points (e.g. the ELF programs)? If so, where is the source for this boot ROM?
• Where can I find the latest system memory map for release 0.5? Is this still accurate from 0.2?
• What is the purpose of BRAM when we have DDR DRAM? In a production system, would BRAM actually be something like Flash since the reset vector is likely somewhere in low memory?

Start with bare_metal/examples/hello.c, bare_metal/driver/test.ld, and the earlier driver/test.ld, then compare their entry points with the cited privileged specification. Trace the boot and memory-map sources for releases 0.2 and 0.5, including any reset or loader implementation mentioned by the repository. Done means the release-specific reset PCs, boot-ROM location, current memory map, and BRAM role are documented.