lowRISC / lowRISC/lowrisc-chip
make[3]: vivado: Command not found ../common.mk:2: recipe for target 'all' failed
Nobody has claimed this yet.
- Dominant language
- SystemVerilog
- Stars
- 601
- Forks
- 147
- PR merge metrics
- No merged PRs in 30d
Description
Hi
I am trying lowrisc-chip v0.7 by the command:
make nexys4_ddr_ariane
I do source the vivado path by
source /tools/Xilinx/Vivado/2018.3/*.sh
and
which vivado
do found the path of vivado.
However, I do still encounter the command not found as below.
Any hint?
Nicolas
make fpga/work-fpga/nexys4_ddr_ariane/ariane_xilinx.mcs BOARD="nexys4_ddr" CPU="ariane" BITSIZE=0x400000 XILINX_PART=xc7a100tcsg324-1 XILINX_BOARD="digilentinc.com:nexys4_ddr:part0:1.1" VENDOR="ethz" MEMSIZE="0x8000000" BBL=/home/nicolast0604/lowrisc-chip-ariane-v0.7/lowrisc-quickstart/rescue.bin |& tee nexys4_ddr_ariane.log
make[1]: Entering directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7'
[FPGA] Generate source list
[FPGA] Generate Bitstream
make -C fpga mcs BOARD=nexys4_ddr BITSIZE=0x400000 XILINX_PART=xc7a100tcsg324-1 XILINX_BOARD=digilentinc.com:nexys4_ddr:part0:1.1 CPU=ariane CLK_PERIOD_NS="20"
make[2]: Entering directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga'
mkdir -p work-fpga/nexys4_ddr_ariane
Generating xlnx_axi_clock_converter.xci
make[3]: Entering directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga/xilinx/xlnx_axi_clock_converter'
rm -rf nexys4_ddr/ip/*
mkdir -p nexys4_ddr/ip
rm -rf nexys4_ddr/xlnx_axi_clock_converter.*
rm -rf component.xml
rm -rf vivado*.jou
rm -rf vivado*.log
rm -rf vivado*.str
rm -rf xgui
rm -rf .Xil
make[3]: Leaving directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga/xilinx/xlnx_axi_clock_converter'
make[3]: Entering directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga/xilinx/xlnx_axi_clock_converter'
vivado -mode batch -source tcl/run.tcl
make[3]: vivado: Command not found
../common.mk:2: recipe for target 'all' failed
make[3]: *** [all] Error 127
make[3]: Leaving directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga/xilinx/xlnx_axi_clock_converter'
Makefile:45: recipe for target 'work-fpga/nexys4_ddr_ariane/xlnx_axi_clock_converter.xci' failed
make[2]: *** [work-fpga/nexys4_ddr_ariane/xlnx_axi_clock_converter.xci] Error 2
make[2]: Leaving directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7/fpga'
Makefile:45: recipe for target 'fpga/work-fpga/nexys4_ddr_ariane/ariane_xilinx.mcs' failed
make[1]: *** [fpga/work-fpga/nexys4_ddr_ariane/ariane_xilinx.mcs] Error 2
make[1]: Leaving directory '/home/nicolast0604/lowrisc-chip-ariane-v0.7'
Contributor guide
No contributing guide indexed for this repository
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start with the make nexys4_ddr_ariane command and the failing invocation in fpga/xilinx/xlnx_axi_clock_converter, where tcl/run.tcl is run through common.mk. Check how the Vivado path is passed into nested make processes and confirm that vivado is available there. Done means the build reaches the next FPGA generation step without “vivado: Command not found.”
Written by the indexing model from the issue text.
Assessment
- Domain
- build-system, embedded-iot
- Issue type
- Bug
- Difficulty
- 2/5
- Estimated time
- 1-3 hours
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100