lowRISC / lowRISC/lowrisc-chip

How to add a new peripheral

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Dominant language
SystemVerilog
Stars
601
Forks
147
PR merge metrics
No merged PRs in 30d

Description

Hello,
I am working on the lowrisc frame-buffer branch and trying to understand how the VGA peripheral works. My initial objective was to increase the VGA resolution, so I started looking at the psoc and fstore2 modules, but it seem too complex.

My understanding is that, to access a peripheral, one has to write/read from the AXI BRAM controller, and the peripheral address decoding is done at periph_soc.sv. I also saw that the Memory map of the BRAM is used by the other peripherals, so is it possible to add other peripherals? And since the BRAM is almost full, can these peripherals be mapped to the DDR instead? If yes, can you advise me a direction to take?

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First steps

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  3. Fork the repository and make your change on a branch.
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Research direction

Start with periph_soc.sv and the psoc and fstore2 modules on the lowrisc frame-buffer branch to trace the existing VGA peripheral and BRAM address map. The issue needs a concrete peripheral or resolution target before implementation can be considered done; first clarify whether DDR mapping is supported and what change is required.

Written by the indexing model from the issue text.

Assessment

Domain
embedded-iot
Issue type
Feature
Difficulty
5/5
Estimated time
Over a week
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

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