lowRISC / lowRISC/lowrisc-chip
How to change the address map of 0x0~0x0FFF)FFFF, for exmaple interrupt controller
Nobody has claimed this yet.
- Dominant language
- SystemVerilog
- Stars
- 601
- Forks
- 147
- PR merge metrics
- No merged PRs in 30d
Description
1. For rocket chip default configuration,
Generated Address Map
0 - 1000 ARWX debug-controller@0
3000 - 4000 ARWX error-device@3000
1_0000 - 2_0000 R X rom@10000
200_0000 - 201_0000 ARW clint@2000000
c00_0000 - 1000_0000 ARW interrupt-controller@c000000
6000_0000 - 8000_0000 RWX mmio-port-axi4@60000000
8000_0000 - 9000_0000 RWXC memory@80000000
How to change the address map of 0x0~0x0FFF_FFFF, for example interrupt controller?
2. How to change memory section address?
3. How to change mmio section address?
4. Could we remove rocket-chip internal TLROM?
5. How to change AXI burst length? for example 16.
Contributor guide
No contributing guide indexed for this repository
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start with the Rocket Chip default configuration that produces the shown generated address map. Trace how the interrupt-controller, memory, MMIO, TLROM, and AXI burst settings are defined, then determine the configuration points needed to change each requested address or option.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 15/100