PMP: Try to implement support for 64 regions
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Component:RTL
Type:Enhancement
- Dominant language
- SystemVerilog
- Stars
- 2.1k
- Forks
- 810
- Avg merge
- 5d 23h
- Merged PRs (30d)
- 9
Description
An upcoming RISC-V ISA spec is likely to support 64 PMP entries (currently, the maximum is at 16). We should give the implementation a try to see how area and performance increase.
https://github.com/riscv/riscv-isa-manual/pull/525
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by reviewing the linked RISC-V ISA proposal and locating Ibex's current PMP implementation. Compare the existing 16-entry design with a 64-entry implementation, measuring the resulting area and performance changes. Done means the support is implemented and those trade-offs are reported.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100