Possible optimisations in UVM Makefile
Nobody has claimed this yet.
- Dominant language
- SystemVerilog
- Stars
- 2.1k
- Forks
- 810
- Avg merge
- 5d 23h
- Merged PRs (30d)
- 9
Description
This issue separately tracks a specific part of issue #674.
The Makefile in `dv/uvm/core_ibex/Makefile` tries to be careful to regenerate targets if you change an option. This way, we ensure that if you run make twice with the same test (say) but change options, the test will actually be rebuilt and re-run.
One unfortunate side-effect is that the second command in
make SEED=123 TEST=foo
make SEED=123 TEST=bar
will start by deleting the results for the `foo` test. (As far as the Makefile is concerned, TEST is just another option that affects the output of the test generation stage).
This issue is to track whether we can avoid that somehow. Also, maybe there are other rebuilds we can avoid, such as rebuilding the instruction generator when you've just changed the test list.
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start with dv/uvm/core_ibex/Makefile and reproduce the behavior using the two make commands shown in the issue. Trace how option changes affect generated targets and determine whether the foo results remain intact and unnecessary instruction-generator rebuilds are avoided.
Written by the indexing model from the issue text.
Assessment
- Domain
- build-system, testing-qa
- Issue type
- Refactor
- Difficulty
- 3/5
- Estimated time
- 1-2 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100