Expose IC_SIZE_BYTES as a module parameter in ibex_top
Nobody has claimed this yet.
- Dominant language
- SystemVerilog
- Stars
- 2.1k
- Forks
- 810
- Avg merge
- 5d 23h
- Merged PRs (30d)
- 9
Description
I would like to expose CacheSizeBytes as a module parameter in ibex_top so that it can be set at the instantiation of Ibex. Currently it is defined in ibex_pkg.sv and modifying it requires updating the package - this also makes it a bit tricky to have multiple instances of Ibex with different cache sizes since they share the same package.
I understand that the default cache size has been the focus of testing to date, so exposing the parameter does allow users to pick potentially undertested settings. For what it's worth I have extensive experience using Ibex on a 1KiB cache size.
Looking forward to hearing people's feedback on this.
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by reading ibex_top and ibex_pkg.sv to trace how CacheSizeBytes and IC_SIZE_BYTES are defined and consumed. Check the existing instantiation and verification paths for the default cache size. Done means Ibex can be instantiated with different cache sizes while preserving the current default behavior.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Quiet
- Clarity
- Mostly clear
- Newbie friendliness
- 55/100