lowRISC / lowRISC/ibex

Missing `ifdef guard from assertion in ibex_core.sv

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Type:Bug
Dominant language
SystemVerilog
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Description

## Observed Behavior

Building ibex without INC_ASSERT define fails due to missing guard in [ibex_core.sv](https://github.com/lowRISC/ibex/blob/master/rtl/ibex_core.sv#L1858).

## Expected Behavior

Expecting core to elaborate without this define.

## Steps to reproduce the issue

This assertion relies on logic only present in [ibex_ex_block.sv](https://github.com/lowRISC/ibex/blob/master/rtl/ibex_ex_block.sv) when it is compiled with this assertion. If ex_block is compiled with the define, elaboration succeeds without issues.

## My Environment

RHEL7 / Questa

Compiling source codes based on external filelists and Questa commands in makefile.

**Version of the Ibex source code:**

The issue is present in current master (53888bcdf4ca3c07e5e715fb6386cb4cc643a61b), assertion was introduced by [[rtl] Guard...](https://github.com/lowRISC/ibex/blame/master/rtl/ibex_core.sv#L1858) merge.

## Edit: Testing more locally

This seems to be more complex issue than I originally figured. Simply inserting guard ifdef does not fix the issue, Module seems to be inheriting the INC_ASSERT define from somewhere (and the ex_block does not). Probably from includes that define the macros, but I did not investigate that too much yet.

Alternative is to use the SYNTHESIS define which of course disables all assertions.

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start at the assertion around line 1858 of rtl/ibex_core.sv and compare how INC_ASSERT is defined when rtl/ibex_ex_block.sv is compiled. Reproduce the failure with the external filelists and Questa commands described in the issue, then trace the relevant includes and defines. Done means the core elaborates without INC_ASSERT while preserving assertion behavior when the define is enabled.

Written by the indexing model from the issue text.

Assessment

Domain
embedded-iot, testing-qa
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
35/100

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