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Hello, recently I have been trying to generate a .xclbin file using Vitis and Vivado, using ibex as the kernel code.

During this process, I encountered some errors in Vivado. Initially, I ran the behavior simulation using only the files under the ibex-master/rtl directory, with Ibex_top.sv as the top module.

However, Vivado showed errors indicating that some package files were missing. To resolve this, I included all the files from the directories where those missing files were located as sources for running the behavior simulation. Based on the error messages, I selected the following directory files to use as my source:
```
ibex-master\rtl\
ibex-master\vendor\lowrisc_ip\ip\prim\rtl\
ibex-master\dv\uvm\core_ibex\common\prim\
ibex-master\vendor\lowrisc_ip\ip\prim_generic\rtl\
ibex-master\vendor\lowrisc_ip\ip\prim_xilinx\rtl\
dv_fcov_macros.svh
```
After including these files, Vivado's messages did not show any missing files, but the error message indicated issues with a few lines in my xsim_3.c file, like this:
```
xsim.dir/code_tb_behav/obj/xsim_3.c:140:25: error: expected initializer before ‘.’ token
int gen_prefetch_buffer.simutil_get_scramble_key(svBitVecVal arg0[SV_PACKED_DATA_NELEMS(128)])
```
As xsim_3.c is automatically generated by Vivado, I am now considering the possibility that some of the sources I selected might be incorrect, leading to this error.

## My Environment

**EDA tool and version:**

Vivado 2020.2

**Operating system:**

Ubuntu Linux 18.04

**Version of the Ibex source code:**

Start with the Ibex_top.sv behavior-simulation setup and the listed rtl, vendor, and dv/uvm source directories in Vivado 2020.2. Reproduce the generated xsim_3.c error around gen_prefetch_buffer.simutil_get_scramble_key and verify which sources are required for the simulation. Done means identifying the incorrect or incompatible source setup, or documenting the missing information needed to diagnose it.

Written by the indexing model from the issue text.