lowRISC / lowRISC/ibex

Error when I make in ibex UVM DV

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Component:DV Type:Bug Type:Question
Dominant language
SystemVerilog
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Description

Hi, I am a new learner in ibex DV,I tried IBEX DV in vcs2016,questa2021,xcelium2018 but failed. I guess it's because my SV simulator version,so I changed to CentOS7.9,python 3.8.10,VCS2020.03,but there are still problems as follow:
image
the corresponding compile_tb.log as following:
[compile_tb_vcs2020_ibex.log](https://github.com/lowRISC/ibex/files/10065680/compile_tb_vcs2020_ibex.log)
I find the following error in log:
![image](https://user-images.githubusercontent.com/77762994/203270699-34d87fe7-55d8-4bc2-8bd5-22c637d3c05c.png)

Can you help me?

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  3. Fork the repository and make your change on a branch.
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Research direction

Start by reviewing compile_tb_vcs2020_ibex.log and the reported compile error, then compare the VCS 2020.03 setup with the earlier VCS, Questa, and Xcelium attempts. Reproduce the Ibex UVM DV compilation on CentOS 7.9 with Python 3.8.10; done means the testbench compiles successfully or the required supported simulator configuration is documented.

Written by the indexing model from the issue text.

Assessment

Domain
testing-qa
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
20/100

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