Unable to build simple sytstem
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- SystemVerilog
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Description
## My Environment
fusesoc --cores-root=. run --target=sim --setup --build lowrisc:ibex:ibex_simple_system_cosim --RV32E=0 --RV32M=ibex_pkg::RV32MFast
ERROR: In file included from ../src/lowrisc_dv_cosim_0/spike_cosim.cc:5:0:
../src/lowrisc_dv_cosim_0/spike_cosim.h:9:10: fatal error: riscv/devices.h: No such file or directory
#include "riscv/devices.h"
^~~~~~~~~~~~~~~~~
compilation terminated.
make[1]: *** [spike_cosim.o] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Vibex_simple_system] Error 2
ERROR: Failed to build lowrisc:ibex:ibex_simple_system_cosim:0 : '['make', '-j', '6']' exited with an error: 2
**EDA tool and version:**
Using Cadence 20.03-s08
**Operating system:**
CentOS 7
**Version of the Ibex source code:**
Using master branch
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Reproduce the reported FuseSoC command on the master branch and inspect the cosimulation build around src/lowrisc_dv_cosim_0/spike_cosim.cc and spike_cosim.h. Trace how the missing riscv/devices.h dependency is expected to be provided, then verify that the ibex_simple_system_cosim target builds successfully.
Written by the indexing model from the issue text.
Assessment
- Domain
- build-system
- Issue type
- Bug
- Difficulty
- 3/5
- Estimated time
- 1-2 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100