lowRISC / lowRISC/ibex

[rtl] Use IF skid buffer to reduce mis-predict penalty for branch prediction

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Component:RTL Type:Task
Dominant language
SystemVerilog
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Merged PRs (30d)
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Description

When a branch is predicted taken Ibex may have already prefetched the instruction that follows the branch but will throw it away to follow the branch prediction. If the branch was mis-predicted it then needs to refetch the instruction following the branch causing a stall cycle.

The skid buffer in the IF could be used to hold any prefetched instruction that follows a branch and remove the mis-predict penalty in some cases.

Contributor guide

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First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by locating Ibex's instruction-fetch skid buffer and branch-prediction or misprediction handling in the RTL. Trace how a prefetched instruction after a branch is discarded, then determine whether the buffer can retain it; done means applicable mispredictions no longer incur the refetch stall without breaking existing behavior.

Written by the indexing model from the issue text.

Assessment

Domain
embedded-iot, performance
Issue type
Refactor
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
25/100

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