No SEL pins for ROM and RAM

The original Logisim ROM and RAM components had SEL pins that had to be set (1) to select/enable the device.

In fact the Logisim Evolution Help reference page still describes the original Logisim RAM and ROM components, including their SEL pins (that's another issue).

The RAM component does have a C1 "clock" input pin that acts somewhat like a SEL pin, but it only enables/disables the RAM's store/write function, not its load/read function. The ROM component has only address pins and data (output) pins.

The SEL pin did exactly what you would expect. For the RAM component, when SEL is 0 (device disabled), both the store (M1 pin) and load (M2 pin) functions are disabled (those pins have no effect) and the data outputs are high-Z. For the ROM component, when SEL is 0 its data outputs are high-Z.

It's not clear to me why L-E removed those SEL pins, given that every RAM or ROM IC I've ever seen has at least one select/enable pin.

Without those pins I'm forced to add extra logic around the RAM and ROM components to perform the missing SEL function. And if I need to use multiple RAM and/or ROM components, I either have to add that logic around every instance, or create a subcircuit, which hides most of the useful functionality of the native RAM and ROM components (address grid, currently selected address, right-click to edit, load, etc.).

Please consider (re)adding the SEL pin to the ROM and RAM components.

Thanks.

Start by locating the RAM and ROM component implementations and any tests covering their pins, loading, storing, and high-Z outputs. Confirm how a new SEL input should affect each component: disabling reads and writes for RAM, and disabling outputs for both components. Done means both components expose SEL with the requested behavior and the relevant tests pass.

Written by the indexing model from the issue text.