llvm / llvm/llvm-project

[DirectX][LongVector] Map vector_reduce of and an or to the any\all expansions

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#224,710 0 comments 0 reactions 1 assignee Claimed by @farzonl View on GitHub
backend:DirectX
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Description

This is a multipart change.
vector_reduce_and and vector_reduce_or need to eventually map to the DXILOps `309` and `310`
So if we get SM 6.9 we should pass these on through to the DXIL.td unchanged.

If we are not 6.9 though we need an expansion. Luckily we have the intrinsic expansions pass and can easily handed the custom scalarization there.

Finally if we get an all and any and we are in SM6.9 we should map those intrinsics to vector_reduce_and and vector_reduce_or.

## Background

### New DXIL Intrinsics

#### `VectorReduce` OpCodeClass

A new generic OpCodeClass `VectorReduce` is introduced for usage in new operations
below. `VectorReduce` combines a vector of elements into a single element with
the same type as the vector element type. The elements are combined using an
operation specified by the opcode parameter.

#### Boolean Vector Reduction Intrinsics

**VectorReduceAnd**

Bitwise AND reduction of the vector returning a scalar. Return type matches vector element type.

The scalar type may be `i1`, `i8`, `i16,` `i32`, or `i64`.

```C++
DXIL::OpCode::VectorReduceAnd = 309
```

```asm
[TYPE] @dx.op.vectorReduce.v[NUM][TY](309, <[NUM] x [TYPE]> operand)
```

**VectorReduceOr**

Bitwise OR reduction of the vector returning a scalar. Return type matches vector element type.

The scalar type may be `i1`, `i8`, `i16,` `i32`, or `i64`.

```C++
DXIL::OpCode::VectorReduceOr = 310
```

```asm
[TYPE] @dx.op.vectorReduce.v[NUM][TY](310, <[NUM] x [TYPE]> operand)

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