llvm / llvm/llvm-project

[IR][APFloat] ppc_fp128 constant with a -0.0 low component changes bits through textual IR

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confirmed miscompilation
Dominant language
LLVM
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Description

A negated PPCDoubleDouble value has a `-0.0` low component. The textual
IR printer compares the decimal string numerically, so it prints the
constant in decimal, and the parser reads it back with a `+0.0` low
component. The bit pattern changes through a print/parse cycle.

```
APFloat One(APFloat::PPCDoubleDouble(), "1.0");
One.changeSign();
// bits: 0x8000000000000000_BFF0000000000000 (lo = -0.0, hi = -1.0)
APFloat Parsed(APFloat::PPCDoubleDouble(), "-1.0");
// bits: 0x0000000000000000_BFF0000000000000 (lo = +0.0, hi = -1.0)
One.bitwiseIsEqual(Parsed); // false
One == Parsed; // true
```

`writeAPFloatInternal` in `llvm/lib/IR/AsmWriter.cpp` uses `operator==`
before it prints the decimal form, so `-1.000000e+00` is emitted for both
patterns. The MLIR printer and llubi use `bitwiseIsEqual` and fall back to
hex for the negated pattern.

Either the printer should compare bitwise and print hex for the `-0.0` low
component (as MLIR does), or `DoubleAPFloat::changeSign` / the parser
should agree on the sign of a zero low component.

Found while working on #218471, which left `AsmWriter.cpp` unchanged for
this reason.

Contributor guide

Open the contributing guide

Research direction

Start in llvm/lib/IR/AsmWriter.cpp at writeAPFloatInternal and reproduce the PPCDoubleDouble print/parse example from the issue. Compare the existing MLIR printer behavior with the APFloat parsing and changeSign paths; done means a textual IR round trip preserves bitwise equality for the -0.0 low component.

Written by the indexing model from the issue text.

Assessment

Tech stack
cpp
Domain
compilers
Issue type
Bug
Difficulty
3/5
Estimated time
1-2 days
Activity status
Active
Clarity
Mostly clear
Newbie friendliness
55/100

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