[MLIR] Missed optimization: Redundant `gpu.barrier` between consecutive read operations
- Dominant language
- LLVM
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Description
The GPU barrier elimination pass fails to eliminate a redundant `gpu.barrier` when it occurs between two consecutive `memref.load` operations on the same memory region without any intervening store/write side-effects.
In the example below, B1 is redundant because B0 already synchronizes the preceding store, and no memory write occurs between B0 and B1 (only a Read-After-Read sequence). B1 should be safely removed.
### Reproduction Example
**input.mlir**
```mlir
module {
gpu.module @kernel_module {
gpu.func @cutoff(%arg0: memref<32xi32> {llvm.noalias}, %arg1: memref<32xi32> {llvm.noalias}, %arg2: i1) kernel {
%thread_id_x = gpu.thread_id x
%c31 = arith.constant 31 : index
%0 = arith.subi %c31, %thread_id_x : index
%1 = arith.index_cast %thread_id_x : index to i32
memref.store %1, %arg0[%thread_id_x] : memref<32xi32>
%2 = scf.if %arg2 -> (i32) {
gpu.barrier // B0
%3 = memref.load %arg0[%0] : memref<32xi32>
gpu.barrier // B1
%4 = memref.load %arg0[%0] : memref<32xi32>
%5 = arith.addi %3, %4 : i32
scf.yield %5 : i32
} else {
scf.yield %1 : i32
}
memref.store %2, %arg1[%thread_id_x] : memref<32xi32>
gpu.return
}
}
}
```
### Command
```bash
mlir-opt --gpu-eliminate-barriers input.mlir
```
Version: 6f54fe6b6fb22f8a335fd19b94049fc769dfea25
Contributor guide
Research direction
Run `mlir-opt --gpu-eliminate-barriers input.mlir` on the provided reproduction and trace the GPU barrier elimination pass. Done means the second barrier, B1, is eliminated while the first barrier and surrounding operations remain valid.
Written by the indexing model from the issue text.
Assessment
- Domain
- compilers
- Issue type
- Bug
- Difficulty
- 3/5
- Estimated time
- 1-2 days
- Activity status
- Active
- Clarity
- Mostly clear
- Newbie friendliness
- 65/100