[AMDGPU] Refactor the TSFlags so that is isVOP3P does not automatically imply isVOP3.

Refactor the TSFlags so that isVOP3P does not automatically imply isVOP3.

isVOP3 is often used as a predicate in tablgen and cpp and t has multiple meanings in the current code. One is shorthand for is the encoding of the instruction 64-bits. From a instruction encoding perspective, however, VOP3 and VOP3P are separate.

This task likely requires adjusting which predicates are used on tablegen pattern and operand generator functions.

Start by tracing TSFlags and the current isVOP3 predicate through the AMDGPU TableGen pattern and operand generator functions, then inspect the corresponding C++ uses. Separate the predicates so VOP3P no longer implies VOP3 while preserving the intended 64-bit encoding checks. Done means the affected TableGen and C++ paths use the correct predicate for each meaning.

Written by the indexing model from the issue text.