[X86] Lower PARTIAL_REDUCE_SMLA/UMLA/USMLA nodes with X86ISD::VPMADDWD/VPMADDUBSW directly
Open
backend:X86
missed-optimization
- Dominant language
- LLVM
- Stars
- 40.5k
- Forks
- 18.7k
- PR merge metrics
- PR metrics pending
Description
Extension to #205373 which just handled VNNI - PMADDWD/PMADDUBSW instructions can do a pretty good job of lowering vXi16/vXi8 mul-add reduction patterns.
Contributor guide
Research direction
Start by reading issue #205373 and the existing VNNI lowering for PARTIAL_REDUCE_SMLA/UMLA/USMLA nodes. Trace the X86 lowering entry points for vXi16 and vXi8 mul-add reduction patterns, then verify that PMADDWD and PMADDUBSW are selected for the corresponding cases.
Written by the indexing model from the issue text.
Assessment
- Domain
- compilers
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Active
- Clarity
- Mostly clear
- Newbie friendliness
- 45/100