llvm / llvm/llvm-project

[X86] Improve llvm.get.active.lane.mask codegen

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#222,659 2 comments 0 reactions 1 assignee Claimed by @houngkoungting View on GitHub
backend:X86 missed-optimization
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Description

As discussed here: https://github.com/llvm/llvm-project/pull/212710#discussion_r3955969096

Current x86 codegen here: #221978 + https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/X86/active_lane_mask.ll

X86 currently always expands Intrinsic::get_active_lane_mask into a SPLAT/UADDSAT/SETCC sequence in SelectionDAGBuilder::visitIntrinsicCall.

But as its little endian and only ever deals with fixed vector types, there's potential to expand as a (vXi1 (bitcast iX (shl))) sequence instead - combineToExtendBoolVectorInReg is pretty good at handling this.

This might be worth performing in TargetLowering to allow other targets to use it in the future - and help keep it as generic as possible.

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