[LV][X86][LoopFullUnroll] very suboptimal stride vectorization

https://godbolt.org/z/EazzWKx5a

found from https://github.com/Multicorewareinc/x265/blob/master/source/common/pixel.cpp#L279-L289

```c++
#include

typedef uint16_t pixel;
typedef uint64_t sum2_t;
typedef uint32_t sum_t;

#define BITS_PER_SUM (8 * sizeof(sum_t))

#define HADAMARD4(d0, d1, d2, d3, s0, s1, s2, s3) { \
sum2_t t0 = s0 + s1; \
sum2_t t1 = s0 - s1; \
sum2_t t2 = s2 + s3; \
sum2_t t3 = s2 - s3; \
d0 = t0 + t2; \
d2 = t0 - t2; \
d1 = t1 + t3; \
d3 = t1 - t3; \
}

inline sum2_t abs2(sum2_t a)
{
sum2_t s = ((a >> (BITS_PER_SUM - 1)) & (((sum2_t)1 << BITS_PER_SUM) + 1)) * ((sum_t)-1);

return (a + s) ^ s;
}

static int satd_8x4(const pixel* pix1, intptr_t stride_pix1, const pixel* pix2, intptr_t stride_pix2)
{
sum2_t tmp[4][4];
sum2_t a0, a1, a2, a3;
sum2_t sum = 0;

for (int i = 0; i < 4; i++, pix1 += stride_pix1, pix2 += stride_pix2)
{
a0 = (pix1[0] - pix2[0]) + ((sum2_t)(pix1[4] - pix2[4]) << BITS_PER_SUM);
a1 = (pix1[1] - pix2[1]) + ((sum2_t)(pix1[5] - pix2[5]) << BITS_PER_SUM);
a2 = (pix1[2] - pix2[2]) + ((sum2_t)(pix1[6] - pix2[6]) << BITS_PER_SUM);
a3 = (pix1[3] - pix2[3]) + ((sum2_t)(pix1[7] - pix2[7]) << BITS_PER_SUM);
HADAMARD4(tmp[i][0], tmp[i][1], tmp[i][2], tmp[i][3], a0, a1, a2, a3);
}

for (int i = 0; i < 4; i++)
{
HADAMARD4(a0, a1, a2, a3, tmp[0][i], tmp[1][i], tmp[2][i], tmp[3][i]);
sum += abs2(a0) + abs2(a1) + abs2(a2) + abs2(a3);
}

return (((sum_t)sum) + (sum >> BITS_PER_SUM)) >> 1;
}

#define w 4
#define h 64

int satd8(const pixel* pix1, intptr_t stride_pix1, const pixel* pix2, intptr_t stride_pix2)
{
int satd = 0;

for (int row = 0; row < h; row += 4)
for (int col = 0; col < w; col += 8)
satd += satd_8x4(pix1 + row * stride_pix1 + col, stride_pix1,
pix2 + row * stride_pix2 + col, stride_pix2);

return satd;
}
```
-O3 -march=znver5 -fno-vectorize (SLP-only):
```asm
.LCPI0_0:
.quad 6
.quad 2
.quad 7
.quad 3
.quad 4
.quad 0
.quad 5
.quad 1
.LCPI0_1:
.quad 4294967297
satd8(unsigned short const*, long, unsigned short const*, long):
push rbp
push r15
push r14
push rbx
vmovdqa64 zmm0, zmmword ptr [rip + .LCPI0_0]
vpbroadcastq zmm1, qword ptr [rip + .LCPI0_1]
mov bpl, -86
lea r8, [8*rcx]
lea r9, [8*rsi]
lea r10, [rsi + rsi]
lea r11, [rcx + rcx]
mov rbx, -4
xor eax, eax
kmovd k1, ebp
mov bpl, -52
kmovd k2, ebp
.LBB0_1:
vmovq xmm2, qword ptr [rdi + 2*rsi]
vmovq xmm3, qword ptr [rdi]
vmovq xmm4, qword ptr [rdx]
vmovq xmm5, qword ptr [rdx + 8]
lea r14, [rdi + r10]
lea r15, [rdx + r11]
add rbx, 4
add r14, r10
add r15, r11
vmovq xmm6, qword ptr [r15 + 2*rcx + 8]
vpunpcklqdq xmm2, xmm3, xmm2
vmovq xmm3, qword ptr [rdx + 2*rcx]
vpmovzxwq zmm2, xmm2
vpunpcklqdq xmm3, xmm4, xmm3
vmovq xmm4, qword ptr [rdi + 8]
vpmovzxwq zmm3, xmm3
vpsubq zmm2, zmm2, zmm3
vmovq xmm3, qword ptr [rdi + 2*rsi + 8]
vpunpcklqdq xmm3, xmm4, xmm3
vmovq xmm4, qword ptr [rdx + 2*rcx + 8]
vpmovzxwq zmm3, xmm3
vpunpcklqdq xmm4, xmm5, xmm4
vmovq xmm5, qword ptr [r15 + 2*rcx]
vpmovzxwq zmm4, xmm4
vpsubq zmm3, zmm3, zmm4
vpsllq zmm3, zmm3, 32
vpaddq zmm2, zmm3, zmm2
vpshufd zmm3, zmm2, 78
vpaddq zmm4, zmm3, zmm2
vpsubq zmm4 {k1}, zmm3, zmm2
vpermq zmm2, zmm4, 78
vpsubq zmm3, zmm4, zmm2
vpaddq zmm3 {k2}, zmm4, zmm2
vmovq xmm2, qword ptr [rdi + 4*rsi]
vmovq xmm4, qword ptr [r14 + 2*rsi]
vpunpcklqdq xmm2, xmm2, xmm4
vmovq xmm4, qword ptr [rdx + 4*rcx]
vpmovzxwq zmm2, xmm2
vpunpcklqdq xmm4, xmm4, xmm5
vmovq xmm5, qword ptr [r14 + 2*rsi + 8]
vpmovzxwq zmm4, xmm4
vpsubq zmm2, zmm2, zmm4
vmovq xmm4, qword ptr [rdi + 4*rsi + 8]
add rdi, r9
vpunpcklqdq xmm4, xmm4, xmm5
vmovq xmm5, qword ptr [rdx + 4*rcx + 8]
add rdx, r8
vpmovzxwq zmm4, xmm4
vpunpcklqdq xmm5, xmm5, xmm6
vshufi64x2 zmm6, zmm3, zmm3, 78
vpmovzxwq zmm5, xmm5
vpsubq zmm4, zmm4, zmm5
vpsllq zmm4, zmm4, 32
vpaddq zmm2, zmm4, zmm2
vpshufd zmm4, zmm2, 78
vpaddq zmm5, zmm4, zmm2
vpsubq zmm5 {k1}, zmm4, zmm2
vpermq zmm2, zmm5, 78
vpsubq zmm4, zmm5, zmm2
vpaddq zmm4 {k2}, zmm5, zmm2
vpsubq zmm5, zmm3, zmm6
vpaddq zmm2, zmm3, zmm6
vshufi64x2 zmm6, zmm4, zmm4, 78
vshufi64x2 zmm2, zmm5, zmm2, 228
vpsubq zmm5, zmm4, zmm6
vpaddq zmm3, zmm4, zmm6
vshufi64x2 zmm3, zmm5, zmm3, 228
vpaddq zmm4, zmm3, zmm2
vpsubq zmm2, zmm2, zmm3
vpermq zmm2, zmm0, zmm2
vpsrlq zmm3, zmm4, 31
vpsrlq zmm5, zmm2, 31
vpandq zmm3, zmm3, zmm1
vpandq zmm5, zmm5, zmm1
vpsllq zmm6, zmm3, 32
vpsllq zmm7, zmm5, 32
vpsubq zmm3, zmm6, zmm3
vpsubq zmm5, zmm7, zmm5
vpaddq zmm4, zmm3, zmm4
vpaddq zmm2, zmm5, zmm2
vpxorq zmm3, zmm4, zmm3
vpxorq zmm2, zmm2, zmm5
vpaddq zmm2, zmm3, zmm2
vextracti64x4 ymm3, zmm2, 1
vpaddq zmm2, zmm2, zmm3
vextracti128 xmm3, ymm2, 1
vpaddq xmm2, xmm2, xmm3
vpshufd xmm3, xmm2, 238
vpaddq xmm2, xmm2, xmm3
vmovq r14, xmm2
mov r15d, r14d
shr r14, 32
add r15, r14
shr r15
add eax, r15d
cmp rbx, 60
jb .LBB0_1
pop rbx
pop r14
pop r15
pop rbp
vzeroupper
ret
```
-O3 -march=znver5 -mllvm -unroll-full-max-count=0 (LV-only without unroll):
```asm
.LCPI0_0:
.quad 4294967297
satd8(unsigned short const*, long, unsigned short const*, long):
push r15
push r14
push rbx
vpbroadcastq ymm0, qword ptr [rip + .LCPI0_0]
lea r8, [8*rcx]
lea r9, [8*rsi]
lea r10, [rsi + rsi]
lea r11, [rcx + rcx]
mov rbx, -4
xor eax, eax
.LBB0_1:
vpmovzxwq ymm1, qword ptr [rdi]
vpmovzxwq ymm2, qword ptr [rdx]
vpmovzxwq ymm3, qword ptr [rdx + 8]
vpmovzxwq ymm4, qword ptr [rdx + 2*rcx + 8]
vpmovzxwq ymm5, qword ptr [rdx + 4*rcx + 8]
lea r14, [rdi + r10]
lea r15, [rdx + r11]
add rbx, 4
add r15, r11
add r14, r10
vpmovzxwq ymm6, qword ptr [r15 + 2*rcx + 8]
vpsubq ymm1, ymm1, ymm2
vpmovzxwq ymm2, qword ptr [rdi + 8]
vpsubq ymm2, ymm2, ymm3
vpsllq ymm2, ymm2, 32
vpaddq ymm1, ymm2, ymm1
vpshufd ymm2, ymm1, 78
vpaddq ymm3, ymm2, ymm1
vpsubq ymm1, ymm2, ymm1
vpblendd ymm1, ymm3, ymm1, 204
vpermq ymm2, ymm1, 78
vpaddq ymm3, ymm1, ymm2
vpsubq ymm1, ymm1, ymm2
vpmovzxwq ymm2, qword ptr [rdi + 2*rsi]
vperm2i128 ymm1, ymm3, ymm1, 33
vpmovzxwq ymm3, qword ptr [rdx + 2*rcx]
vpsubq ymm2, ymm2, ymm3
vpmovzxwq ymm3, qword ptr [rdi + 2*rsi + 8]
vpsubq ymm3, ymm3, ymm4
vpsllq ymm3, ymm3, 32
vpaddq ymm2, ymm3, ymm2
vpshufd ymm3, ymm2, 78
vpaddq ymm4, ymm3, ymm2
vpsubq ymm2, ymm3, ymm2
vpblendd ymm2, ymm4, ymm2, 204
vpermq ymm3, ymm2, 78
vpaddq ymm4, ymm2, ymm3
vpsubq ymm2, ymm2, ymm3
vpmovzxwq ymm3, qword ptr [rdi + 4*rsi]
vperm2i128 ymm2, ymm4, ymm2, 33
vpmovzxwq ymm4, qword ptr [rdx + 4*rcx]
add rdx, r8
vpsubq ymm3, ymm3, ymm4
vpmovzxwq ymm4, qword ptr [rdi + 4*rsi + 8]
add rdi, r9
vpsubq ymm4, ymm4, ymm5
vpsllq ymm4, ymm4, 32
vpaddq ymm3, ymm4, ymm3
vpshufd ymm4, ymm3, 78
vpaddq ymm5, ymm4, ymm3
vpsubq ymm3, ymm4, ymm3
vpblendd ymm3, ymm5, ymm3, 204
vpermq ymm4, ymm3, 78
vpaddq ymm5, ymm3, ymm4
vpsubq ymm3, ymm3, ymm4
vpmovzxwq ymm4, qword ptr [r14 + 2*rsi]
vperm2i128 ymm3, ymm5, ymm3, 33
vpmovzxwq ymm5, qword ptr [r15 + 2*rcx]
vpsubq ymm4, ymm4, ymm5
vpmovzxwq ymm5, qword ptr [r14 + 2*rsi + 8]
vpsubq ymm5, ymm5, ymm6
vpsllq ymm5, ymm5, 32
vpaddq ymm4, ymm5, ymm4
vpshufd ymm5, ymm4, 78
vpaddq ymm6, ymm5, ymm4
vpsubq ymm4, ymm5, ymm4
vpblendd ymm4, ymm6, ymm4, 204
vpermq ymm5, ymm4, 78
vpaddq ymm6, ymm4, ymm5
vpsubq ymm4, ymm4, ymm5
vperm2i128 ymm4, ymm6, ymm4, 33
vpsubq ymm6, ymm1, ymm2
vpaddq ymm1, ymm2, ymm1
vpsubq ymm5, ymm3, ymm4
vpaddq ymm3, ymm4, ymm3
vpaddq ymm7, ymm5, ymm6
vpaddq ymm2, ymm3, ymm1
vpsubq ymm1, ymm1, ymm3
vpsrlq ymm8, ymm7, 31
vpsrlq ymm4, ymm2, 31
vpsrlq ymm3, ymm1, 31
vpand ymm8, ymm8, ymm0
vpand ymm4, ymm4, ymm0
vpand ymm3, ymm3, ymm0
vpsllq ymm9, ymm8, 32
vpsubq ymm8, ymm9, ymm8
vpsllq ymm9, ymm4, 32
vpsubq ymm4, ymm9, ymm4
vpaddq ymm7, ymm8, ymm7
vpaddq ymm2, ymm4, ymm2
vpxor ymm7, ymm8, ymm7
vpxor ymm2, ymm2, ymm4
vpsllq ymm4, ymm3, 32
vpsubq ymm3, ymm4, ymm3
vpaddq ymm2, ymm7, ymm2
vpaddq ymm1, ymm3, ymm1
vpxor ymm1, ymm1, ymm3
vpsubq ymm3, ymm6, ymm5
vpsrlq ymm4, ymm3, 31
vpand ymm4, ymm4, ymm0
vpsllq ymm5, ymm4, 32
vpsubq ymm4, ymm5, ymm4
vpaddq ymm3, ymm4, ymm3
vpxor ymm3, ymm3, ymm4
vpaddq ymm1, ymm1, ymm3
vpaddq ymm1, ymm2, ymm1
vextracti128 xmm2, ymm1, 1
vpaddq xmm1, xmm1, xmm2
vpshufd xmm2, xmm1, 238
vpaddq xmm1, xmm1, xmm2
vmovq r14, xmm1
mov r15d, r14d
shr r14, 32
add r15, r14
shr r15
add eax, r15d
cmp rbx, 60
jb .LBB0_1
pop rbx
pop r14
pop r15
vzeroupper
ret
```
The codegen of both of them is pretty good!

but default -O3 -march=znver5 (LoopFullUnroll+LV+SLP) is:
```asm
.LCPI0_0:
.quad 0
.quad 4
.quad 8
.quad 12
.quad 16
.quad 20
.quad 24
.quad 28
.LCPI0_1:
.quad 4294967297
.LCPI0_2:
.quad 32
satd8(unsigned short const*, long, unsigned short const*, long):
push rbp
push r15
push r14
push r13
push r12
push rbx
sub rsp, 440
vmovdqa64 zmm1, zmmword ptr [rip + .LCPI0_0]
vpbroadcastq zmm0, rsi
mov eax, 16
vpxor xmm2, xmm2, xmm2
mov qword ptr [rsp + 80], rdx
mov qword ptr [rsp + 72], rdi
vmovdqu64 zmmword ptr [rsp + 368], zmm0
vpbroadcastq zmm0, rcx
vmovdqu64 zmmword ptr [rsp + 304], zmm0
.LBB0_1:
vpmullq zmm0, zmm1, zmmword ptr [rsp + 368]
vmovdqu64 zmmword ptr [rsp + 240], zmm1
mov rdi, qword ptr [rsp + 72]
mov qword ptr [rsp + 104], rax
vmovdqu ymmword ptr [rsp + 208], ymm2
vextracti128 xmm1, ymm0, 1
vmovq r9, xmm0
vextracti32x4 xmm2, zmm0, 2
vpextrq qword ptr [rsp - 128], xmm0, 1
vextracti32x4 xmm0, zmm0, 3
vmovq rbp, xmm1
vpextrq qword ptr [rsp - 80], xmm1, 1
vmovdqu64 zmm1, zmmword ptr [rsp + 240]
lea rax, [rdi + 2*r9]
vmovq r15, xmm0
vpextrq r10, xmm0, 1
vmovq r13, xmm2
vpextrq r14, xmm2, 1
vpmullq zmm3, zmm1, zmmword ptr [rsp + 304]
mov qword ptr [rsp - 120], rbp
mov qword ptr [rsp - 48], r10
mov qword ptr [rsp - 8], r15
mov qword ptr [rsp - 96], r13
mov qword ptr [rsp - 40], r14
mov qword ptr [rsp - 104], rax
mov rax, r9
movzx r9d, word ptr [rdi + 2*r9]
vextracti128 xmm0, ymm3, 1
vmovq r12, xmm3
vpextrq r11, xmm3, 1
vextracti32x4 xmm4, zmm3, 2
vextracti32x4 xmm13, zmm3, 3
vmovq r8, xmm0
vpextrq rdx, xmm0, 1
vmovd xmm0, r9d
mov r9, qword ptr [rsp - 128]
vmovq rbx, xmm4
mov qword ptr [rsp - 24], r11
mov qword ptr [rsp - 112], rdx
mov qword ptr [rsp - 16], rbx
mov qword ptr [rsp - 88], r8
vpinsrw xmm0, xmm0, word ptr [rdi + 2*r9], 1
mov r9, qword ptr [rsp - 80]
vpinsrw xmm0, xmm0, word ptr [rdi + 2*rbp], 2
mov rbp, qword ptr [rsp + 80]
vpinsrw xmm0, xmm0, word ptr [rdi + 2*r9], 3
movzx r9d, word ptr [rbp + 2*r12]
vpinsrw xmm0, xmm0, word ptr [rdi + 2*r13], 4
mov r13, qword ptr [rsp - 80]
vmovd xmm1, r9d
movzx r9d, word ptr [rdi + 2*rax + 8]
vpinsrw xmm0, xmm0, word ptr [rdi + 2*r14], 5
mov r14, qword ptr [rsp - 96]
mov qword ptr [rsp - 80], r13
vmovd xmm12, r9d
movzx r9d, word ptr [rbp + 2*r12 + 8]
vpinsrw xmm0, xmm0, word ptr [rdi + 2*r15], 6
mov r15, qword ptr [rsp - 128]
vmovd xmm16, r9d
movzx r9d, word ptr [rdi + 2*rax + 2]
vpinsrw xmm11, xmm0, word ptr [rdi + 2*r10], 7
vpinsrw xmm0, xmm1, word ptr [rbp + 2*r11], 1
lea r10, [rbp + 2*r12]
vmovq r11, xmm13
vpinsrw xmm12, xmm12, word ptr [rdi + 2*r15 + 8], 1
mov qword ptr [rsp + 144], r11
vpinsrw xmm0, xmm0, word ptr [rbp + 2*r8], 2
mov r8, qword ptr [rsp - 88]
vmovd xmm21, r9d
movzx r9d, word ptr [rbp + 2*r12 + 2]
vpinsrw xmm0, xmm0, word ptr [rbp + 2*rdx], 3
vpextrq rdx, xmm4, 1
vpmovzxwq zmm11, xmm11
mov qword ptr [rsp + 16], rdx
vmovd xmm24, r9d
movzx r9d, word ptr [rdi + 2*rax + 10]
vpinsrw xmm18, xmm0, word ptr [rbp + 2*rbx], 4
vmovd xmm7, r9d
movzx r9d, word ptr [rbp + 2*r12 + 10]
vmovd xmm20, r9d
movzx r9d, word ptr [rdi + 2*rax + 4]
vmovd xmm5, r9d
movzx r9d, word ptr [rbp + 2*r12 + 4]
vmovd xmm6, r9d
movzx r9d, word ptr [rdi + 2*rax + 12]
vmovd xmm27, r9d
movzx r9d, word ptr [rbp + 2*r12 + 12]
vmovd xmm1, r9d
movzx r9d, word ptr [rdi + 2*rax + 6]
movzx eax, word ptr [rdi + 2*rax + 14]
vmovd xmm31, r9d
movzx r9d, word ptr [rbp + 2*r12 + 6]
vmovd xmm0, eax
movzx eax, word ptr [rbp + 2*r12 + 14]
mov r12, qword ptr [rsp - 104]
vmovd xmm30, eax
movzx eax, word ptr [r12 + 2*rsi]
movzx ebx, word ptr [r12 + 2*rsi + 14]
vmovd xmm8, r9d
vpextrq r9, xmm13, 1
vmovd xmm10, eax
movzx eax, word ptr [r10 + 2*rcx]
vmovd xmm13, ebx
movzx ebx, word ptr [r10 + 2*rcx + 14]
vmovdqa xmmword ptr [rsp + 48], xmm13
vpinsrw xmm13, xmm18, word ptr [rbp + 2*rdx], 5
vmovd xmm3, eax
movzx eax, word ptr [r12 + 2*rsi + 8]
vpinsrw xmm13, xmm13, word ptr [rbp + 2*r11], 6
vpinsrw xmm13, xmm13, word ptr [rbp + 2*r9], 7
vmovd xmm26, eax
movzx eax, word ptr [r10 + 2*rcx + 8]
vmovd xmm29, eax
movzx eax, word ptr [r12 + 2*rsi + 2]
vpmovzxwq zmm13, xmm13
vmovd xmm9, eax
movzx eax, word ptr [r10 + 2*rcx + 2]
vpsubq zmm13, zmm11, zmm13
vmovd xmm11, ebx
mov rbx, qword ptr [rsp - 8]
vmovd xmm4, eax
movzx eax, word ptr [r12 + 2*rsi + 10]
vmovd xmm15, eax
movzx eax, word ptr [r10 + 2*rcx + 10]
vmovd xmm25, eax
movzx eax, word ptr [r12 + 2*rsi + 4]
vmovd xmm28, eax
movzx eax, word ptr [r10 + 2*rcx + 4]
vmovd xmm23, eax
movzx eax, word ptr [r12 + 2*rsi + 12]
vmovd xmm17, eax
movzx eax, word ptr [r10 + 2*rcx + 12]
vmovd xmm19, eax
movzx eax, word ptr [r12 + 2*rsi + 6]
vmovd xmm14, eax
movzx eax, word ptr [r10 + 2*rcx + 6]
vmovdqa xmmword ptr [rsp + 32], xmm14
vmovd xmm14, eax
mov rax, qword ptr [rsp - 120]
vpinsrw xmm12, xmm12, word ptr [rdi + 2*rax + 8], 2
mov rax, qword ptr [rsp - 40]
vpinsrw xmm12, xmm12, word ptr [rdi + 2*r13 + 8], 3
vpinsrw xmm12, xmm12, word ptr [rdi + 2*r14 + 8], 4
vpinsrw xmm12, xmm12, word ptr [rdi + 2*rax + 8], 5
mov rax, qword ptr [rsp - 48]
vpinsrw xmm12, xmm12, word ptr [rdi + 2*rbx + 8], 6
vpinsrw xmm12, xmm12, word ptr [rdi + 2*rax + 8], 7
mov rax, qword ptr [rsp - 24]
vpinsrw xmm16, xmm16, word ptr [rbp + 2*rax + 8], 1
vpinsrw xmm18, xmm24, word ptr [rbp + 2*rax + 2], 1
vpmovzxwq zmm12, xmm12
vpinsrw xmm16, xmm16, word ptr [rbp + 2*r8 + 8], 2
mov r8, qword ptr [rsp - 112]
vpinsrw xmm16, xmm16, word ptr [rbp + 2*r8 + 8], 3
mov r8, qword ptr [rsp - 16]
vpinsrw xmm16, xmm16, word ptr [rbp + 2*r8 + 8], 4
vpinsrw xmm16, xmm16, word ptr [rbp + 2*rdx + 8], 5
lea rdx, [r12 + 2*rsi]
mov r12, qword ptr [rsp - 40]
mov qword ptr [rsp - 72], rdx
movzx r8d, word ptr [rdx + 2*rsi]
lea rdx, [r10 + 2*rcx]
mov r10, qword ptr [rsp - 120]
vpinsrw xmm16, xmm16, word ptr [rbp + 2*r11 + 8], 6
mov qword ptr [rsp - 64], rdx
mov r11, rax
mov rax, qword ptr [rsp - 48]
vpinsrw xmm16, xmm16, word ptr [rbp + 2*r9 + 8], 7
vpmovzxwq zmm16, xmm16
vpsubq zmm12, zmm12, zmm16
vmovd xmm16, r8d
movzx r8d, word ptr [rdx + 2*rcx]
mov rdx, qword ptr [rsp - 16]
vpsllq zmm12, zmm12, 32
vpaddq zmm22, zmm12, zmm13
vpinsrw xmm12, xmm21, word ptr [rdi + 2*r15 + 2], 1
mov r15, r13
vmovd xmm13, r8d
mov r8, qword ptr [rsp + 144]
vpinsrw xmm12, xmm12, word ptr [rdi + 2*r10 + 2], 2
vpinsrw xmm12, xmm12, word ptr [rdi + 2*r13 + 2], 3
mov r13, qword ptr [rsp + 16]
vpinsrw xmm12, xmm12, word ptr [rdi + 2*r14 + 2], 4
mov r14, qword ptr [rsp - 112]
vpinsrw xmm12, xmm12, word ptr [rdi + 2*r12 + 2], 5
vpinsrw xmm12, xmm12, word ptr [rdi + 2*rbx + 2], 6
mov rbx, qword ptr [rsp - 88]
vpinsrw xmm12, xmm12, word ptr [rdi + 2*rax + 2], 7
vpinsrw xmm18, xmm18, word ptr [rbp + 2*rbx + 2], 2
vpinsrw xmm18, xmm18, word ptr [rbp + 2*r14 + 2], 3
vpmovzxwq zmm12, xmm12
vpinsrw xmm18, xmm18, word ptr [rbp + 2*rdx + 2], 4
vpinsrw xmm18, xmm18, word ptr [rbp + 2*r13 + 2], 5
vpinsrw xmm18, xmm18, word ptr [rbp + 2*r8 + 2], 6
mov r8, qword ptr [rsp - 72]
vpinsrw xmm18, xmm18, word ptr [rbp + 2*r9 + 2], 7
movzx r8d, word ptr [r8 + 2*rsi + 8]
vmovd xmm21, r8d
mov r8, qword ptr [rsp - 128]
vpmovzxwq zmm18, xmm18
vpinsrw xmm7, xmm7, word ptr [rdi + 2*r8 + 10], 1
vpsubq zmm12, zmm12, zmm18
vpinsrw xmm18, xmm20, word ptr [rbp + 2*r11 + 10], 1
mov r11, qword ptr [rsp + 144]
vpinsrw xmm7, xmm7, word ptr [rdi + 2*r10 + 10], 2
mov r10, qword ptr [rsp - 96]
vpinsrw xmm18, xmm18, word ptr [rbp + 2*rbx + 10], 2
mov rbx, rdx
vpinsrw xmm7, xmm7, word ptr [rdi + 2*r15 + 10], 3
mov r15, qword ptr [rsp - 8]
vpinsrw xmm18, xmm18, word ptr [rbp + 2*r14 + 10], 3
mov r14, r9
vpinsrw xmm7, xmm7, word ptr [rdi + 2*r10 + 10], 4
vpinsrw xmm18, xmm18, word ptr [rbp + 2*rdx + 10], 4
mov rdx, qword ptr [rsp - 80]
vpinsrw xmm7, xmm7, word ptr [rdi + 2*r12 + 10], 5
mov r12, qword ptr [rsp - 72]
vpinsrw xmm18, xmm18, word ptr [rbp + 2*r13 + 10], 5
mov r13, qword ptr [rsp - 64]
vpinsrw xmm7, xmm7, word ptr [rdi + 2*r15 + 10], 6
vpinsrw xmm18, xmm18, word ptr [rbp + 2*r11 + 10], 6
movzx r8d, word ptr [r13 + 2*rcx + 8]
vpinsrw xmm7, xmm7, word ptr [rdi + 2*rax + 10], 7
mov rax, qword ptr [rsp - 128]
vpinsrw xmm18, xmm18, word ptr [rbp + 2*r9 + 10], 7
lea r9, [rdi + 2*rdx]
vmovd xmm24, r8d
movzx r8d, word ptr [r12 + 2*rsi + 2]
vpinsrw xmm5, xmm5, word ptr [rdi + 2*rax + 4], 1
vpinsrw xmm0, xmm0, word ptr [rdi + 2*rax + 14], 1
vpmovzxwq zmm7, xmm7
vpmovzxwq zmm18, xmm18
vpsubq zmm7, zmm7, zmm18
vpinsrw xmm18, xmm31, word ptr [rdi + 2*rax + 6], 1
vpsllq zmm7, zmm7, 32
vpaddq zmm7, zmm7, zmm12
vmovd xmm12, r8d
movzx r8d, word ptr [r13 + 2*rcx + 2]
vmovdqa xmmword ptr [rsp + 128], xmm12
vpinsrw xmm12, xmm27, word ptr [rdi + 2*rax + 12], 1
lea rax, [rdi + 2*rax]
mov qword ptr [rsp - 104], rax
mov rax, qword ptr [rsp - 120]
vpinsrw xmm5, xmm5, word ptr [rdi + 2*rax + 4], 2
vpinsrw xmm12, xmm12, word ptr [rdi + 2*rax + 12], 2
vpinsrw xmm18, xmm18, word ptr [rdi + 2*rax + 6], 2
vpinsrw xmm0, xmm0, word ptr [rdi + 2*rax + 14], 2
lea rax, [rdi + 2*rax]
mov qword ptr [rsp - 120], rax
lea rax, [rdi + 2*r10]
vpinsrw xmm5, xmm5, word ptr [rdi + 2*rdx + 4], 3
vpinsrw xmm12, xmm12, word ptr [rdi + 2*rdx + 12], 3
vpinsrw xmm18, xmm18, word ptr [rdi + 2*rdx + 6], 3
vpinsrw xmm0, xmm0, word ptr [rdi + 2*rdx + 14], 3
mov rdx, qword ptr [rsp - 40]
mov qword ptr [rsp - 96], rax
vpinsrw xmm5, xmm5, word ptr [rdi + 2*r10 + 4], 4
vpinsrw xmm12, xmm12, word ptr [rdi + 2*r10 + 12], 4
vpinsrw xmm18, xmm18, word ptr [rdi + 2*r10 + 6], 4
vpinsrw xmm0, xmm0, word ptr [rdi + 2*r10 + 14], 4
lea rax, [rdi + 2*rdx]
mov qword ptr [rsp - 56], rax
lea rax, [rdi + 2*r15]
vpinsrw xmm5, xmm5, word ptr [rdi + 2*rdx + 4], 5
vpinsrw xmm12, xmm12, word ptr [rdi + 2*rdx + 12], 5
vpinsrw xmm18, xmm18, word ptr [rdi + 2*rdx + 6], 5
vpinsrw xmm0, xmm0, word ptr [rdi + 2*rdx + 14], 5
mov rdx, qword ptr [rsp - 48]
mov qword ptr [rsp + 8], rax
vpinsrw xmm12, xmm12, word ptr [rdi + 2*r15 + 12], 6
vpinsrw xmm0, xmm0, word ptr [rdi + 2*r15 + 14], 6
vpinsrw xmm5, xmm5, word ptr [rdi + 2*r15 + 4], 6
vpinsrw xmm18, xmm18, word ptr [rdi + 2*r15 + 6], 6
lea rax, [rdi + 2*rdx]
mov qword ptr [rsp - 48], rax
vpinsrw xmm20, xmm5, word ptr [rdi + 2*rdx + 4], 7
vpinsrw xmm12, xmm12, word ptr [rdi + 2*rdx + 12], 7
vpinsrw xmm5, xmm18, word ptr [rdi + 2*rdx + 6], 7
vpinsrw xmm0, xmm0, word ptr [rdi + 2*rdx + 14], 7
mov rdx, qword ptr [rsp - 24]
mov rdi, qword ptr [rsp + 16]
vpinsrw xmm18, xmm30, word ptr [rbp + 2*rdx + 14], 1
lea rax, [rbp + 2*rdx]
vpinsrw xmm6, xmm6, word ptr [rbp + 2*rdx + 4], 1
vpinsrw xmm1, xmm1, word ptr [rbp + 2*rdx + 12], 1
vpinsrw xmm8, xmm8, word ptr [rbp + 2*rdx + 6], 1
mov rdx, qword ptr [rsp - 88]
vmovd xmm30, r8d
mov qword ptr [rsp], rax
vpmovzxwq zmm12, xmm12
vpmovzxwq zmm20, xmm20
vpmovzxwq zmm5, xmm5
vpmovzxwq zmm0, xmm0
lea rax, [rbp + 2*rdx]
vpinsrw xmm6, xmm6, word ptr [rbp + 2*rdx + 4], 2
vpinsrw xmm1, xmm1, word ptr [rbp + 2*rdx + 12], 2
vpinsrw xmm8, xmm8, word ptr [rbp + 2*rdx + 6], 2
vpinsrw xmm18, xmm18, word ptr [rbp + 2*rdx + 14], 2
mov qword ptr [rsp - 8], rax
mov rax, qword ptr [rsp - 112]
vpinsrw xmm6, xmm6, word ptr [rbp + 2*rax + 4], 3
vpinsrw xmm1, xmm1, word ptr [rbp + 2*rax + 12], 3
vpinsrw xmm8, xmm8, word ptr [rbp + 2*rax + 6], 3
vpinsrw xmm18, xmm18, word ptr [rbp + 2*rax + 14], 3
lea r10, [rbp + 2*rax]
lea rax, [rbp + 2*rbx]
vpinsrw xmm6, xmm6, word ptr [rbp + 2*rbx + 4], 4
vpinsrw xmm1, xmm1, word ptr [rbp + 2*rbx + 12], 4
vpinsrw xmm6, xmm6, word ptr [rbp + 2*rdi + 4], 5
vpinsrw xmm6, xmm6, word ptr [rbp + 2*r11 + 4], 6
vpinsrw xmm6, xmm6, word ptr [rbp + 2*r14 + 4], 7
vpinsrw xmm8, xmm8, word ptr [rbp + 2*rbx + 6], 4
vpinsrw xmm1, xmm1, word ptr [rbp + 2*rdi + 12], 5
movzx r8d, word ptr [r12 + 2*rsi + 10]
vpinsrw xmm18, xmm18, word ptr [rbp + 2*rbx + 14], 4
mov qword ptr [rsp - 16], rax
lea rax, [rbp + 2*rdi]
mov rbx, qword ptr [rsp - 8]
mov rdx, qword ptr [rsp - 120]
mov r15, qword ptr [rsp - 56]
mov qword ptr [rsp - 32], r9
mov qword ptr [rsp - 88], r10
mov qword ptr [rsp - 128], rax
lea rax, [rbp + 2*r11]
vpinsrw xmm1, xmm1, word ptr [rbp + 2*r11 + 12], 6
vpinsrw xmm8, xmm8, word ptr [rbp + 2*rdi + 6], 5
mov qword ptr [rsp - 112], rax
lea rax, [rbp + 2*r14]
vmovd xmm31, r8d
movzx r8d, word ptr [r13 + 2*rcx + 10]
mov qword ptr [rsp - 24], rax
vpinsrw xmm1, xmm1, word ptr [rbp + 2*r14 + 12], 7
vpinsrw xmm8, xmm8, word ptr [rbp + 2*r11 + 6], 6
vpmovzxwq zmm6, xmm6
vpinsrw xmm2, xmm8, word ptr [rbp + 2*r14 + 6], 7
vpsubq zmm6, zmm20, zmm6
vpmovzxwq zmm1, xmm1
vpsubq zmm1, zmm12, zmm1
vpinsrw xmm12, xmm18, word ptr [rbp + 2*rdi + 14], 5
mov rdi, qword ptr [rsp - 48]
vpsllq zmm1, zmm1, 32
vpaddq zmm1, zmm1, zmm6
vpmovzxwq zmm6, xmm2
vmovdqu64 zmmword ptr [rsp + 144], zmm1
vmovd xmm1, r8d
movzx r8d, word ptr [r12 + 2*rsi + 4]
vpinsrw xmm12, xmm12, word ptr [rbp + 2*r11 + 14], 6
mov r11, qword ptr [rsp]
vpsubq zmm6, zmm5, zmm6
vpinsrw xmm2, xmm12, word ptr [rbp + 2*r14 + 14], 7
vmovd xmm27, r8d
movzx r8d, word ptr [r13 + 2*rcx + 4]
mov r14, qword ptr [rsp - 16]
mov rbp, qword ptr [rsp - 96]
mov r13, qword ptr [rsp + 8]
vpinsrw xmm3, xmm3, word ptr [r11 + 2*rcx], 1
vmovd xmm18, r8d
mov r8, qword ptr [rsp - 104]
vpinsrw xmm3, xmm3, word ptr [rbx + 2*rcx], 2
vpmovzxwq zmm5, xmm2
vpinsrw xmm3, xmm3, word ptr [r10 + 2*rcx], 3
vpsubq zmm8, zmm0, zmm5
vpinsrw xmm0, xmm10, word ptr [r8 + 2*rsi], 1
vpinsrw xmm3, xmm3, word ptr [r14 + 2*rcx], 4
mov r14, qword ptr [rsp - 128]
vpinsrw xmm0, xmm0, word ptr [rdx + 2*rsi], 2
vpinsrw xmm3, xmm3, word ptr [r14 + 2*rcx], 5
mov r14, qword ptr [rsp - 112]
vpinsrw xmm0, xmm0, word ptr [r9 + 2*rsi], 3
vpinsrw xmm3, xmm3, word ptr [r14 + 2*rcx], 6
mov r14, qword ptr [rsp - 128]
vpinsrw xmm0, xmm0, word ptr [rbp + 2*rsi], 4
vpinsrw xmm3, xmm3, word ptr [rax + 2*rcx], 7
movzx eax, word ptr [r12 + 2*rsi + 12]
mov r12, rdx
vpinsrw xmm0, xmm0, word ptr [r15 + 2*rsi], 5
vpinsrw xmm0, xmm0, word ptr [r13 + 2*rsi], 6
vmovd xmm5, eax
mov rax, qword ptr [rsp - 64]
vpmovzxwq zmm3, xmm3
vpinsrw xmm0, xmm0, word ptr [rdi + 2*rsi], 7
movzx eax, word ptr [rax + 2*rcx + 12]
vpmovzxwq zmm0, xmm0
vpsubq zmm0, zmm0, zmm3
vpsllq zmm3, zmm8, 32
vpinsrw xmm8, xmm29, word ptr [r11 + 2*rcx + 8], 1
vpaddq zmm10, zmm3, zmm6
vpinsrw xmm6, xmm26, word ptr [r8 + 2*rsi + 8], 1
mov r8, rdi
vmovd xmm3, eax
mov rax, qword ptr [rsp - 72]
vpinsrw xmm8, xmm8, word ptr [rbx + 2*rcx + 8], 2
vpinsrw xmm6, xmm6, word ptr [rdx + 2*rsi + 8], 2
mov rdx, r11
mov r11, qword ptr [rsp - 112]
vpinsrw xmm4, xmm4, word ptr [rdx + 2*rcx + 2], 1
movzx eax, word ptr [rax + 2*rsi + 6]
vpinsrw xmm8, xmm8, word ptr [r10 + 2*rcx + 8], 3
mov r10, r8
vpinsrw xmm6, xmm6, word ptr [r9 + 2*rsi + 8], 3
mov r9, rbx
mov rbx, qword ptr [rsp - 16]
vpinsrw xmm4, xmm4, word ptr [r9 + 2*rcx + 2], 2
mov rdx, r9
mov r9, qword ptr [rsp - 72]
vmovd xmm12, eax
mov rax, qword ptr [rsp - 104]
vpinsrw xmm6, xmm6, word ptr [rbp + 2*rsi + 8], 4
vpinsrw xmm8, xmm8, word ptr [rbx + 2*rcx + 8], 4
vpinsrw xmm6, xmm6, word ptr [r15 + 2*rsi + 8], 5
mov r15, r12
vpinsrw xmm8, xmm8, word ptr [r14 + 2*rcx + 8], 5
vpinsrw xmm6, xmm6, word ptr [r13 + 2*rsi + 8], 6
vpinsrw xmm8, xmm8, word ptr [r11 + 2*rcx + 8], 6
vpinsrw xmm6, xmm6, word ptr [rdi + 2*rsi + 8], 7
mov rdi, qword ptr [rsp - 24]
vpinsrw xmm8, xmm8, word ptr [rdi + 2*rcx + 8], 7
vpmovzxwq zmm6, xmm6
vpmovzxwq zmm8, xmm8
vpsubq zmm6, zmm6, zmm8
vpinsrw xmm8, xmm9, word ptr [rax + 2*rsi + 2], 1
mov rax, qword ptr [rsp - 32]
vpsllq zmm6, zmm6, 32
vpaddq zmm9, zmm6, zmm0
vpinsrw xmm8, xmm8, word ptr [r12 + 2*rsi + 2], 2
mov r12, qword ptr [rsp - 56]
vpinsrw xmm8, xmm8, word ptr [rax + 2*rsi + 2], 3
vpinsrw xmm8, xmm8, word ptr [rbp + 2*rsi + 2], 4
vpinsrw xmm8, xmm8, word ptr [r12 + 2*rsi + 2], 5
vpinsrw xmm8, xmm8, word ptr [r13 + 2*rsi + 2], 6
vpinsrw xmm8, xmm8, word ptr [r8 + 2*rsi + 2], 7
mov r8, qword ptr [rsp - 88]
vpinsrw xmm4, xmm4, word ptr [r8 + 2*rcx + 2], 3
vpmovzxwq zmm8, xmm8
vpinsrw xmm4, xmm4, word ptr [rbx + 2*rcx + 2], 4
mov rbx, rdi
vpinsrw xmm4, xmm4, word ptr [r14 + 2*rcx + 2], 5
mov r14, qword ptr [rsp - 104]
vpinsrw xmm4, xmm4, word ptr [r11 + 2*rcx + 2], 6
mov r11, qword ptr [rsp]
vpinsrw xmm0, xmm15, word ptr [r14 + 2*rsi + 10], 1
vpinsrw xmm4, xmm4, word ptr [rdi + 2*rcx + 2], 7
mov rdi, qword ptr [rsp - 64]
vpinsrw xmm0, xmm0, word ptr [r15 + 2*rsi + 10], 2
mov r15, qword ptr [rsp - 32]
vpinsrw xmm6, xmm25, word ptr [r11 + 2*rcx + 10], 1
vpinsrw xmm6, xmm6, word ptr [rdx + 2*rcx + 10], 2
movzx eax, word ptr [rdi + 2*rcx + 6]
mov rdx, qword ptr [rsp - 96]
vpinsrw xmm0, xmm0, word ptr [r15 + 2*rsi + 10], 3
vpmovzxwq zmm4, xmm4
vpinsrw xmm6, xmm6, word ptr [r8 + 2*rcx + 10], 3
mov r8, qword ptr [rsp - 8]
vpinsrw xmm0, xmm0, word ptr [rbp + 2*rsi + 10], 4
mov rbp, qword ptr [rsp - 128]
vpsubq zmm4, zmm8, zmm4
vmovd xmm8, eax
movzx eax, word ptr [r9 + 2*rsi + 14]
vmovdqa xmmword ptr [rsp + 16], xmm8
vpinsrw xmm0, xmm0, word ptr [r12 + 2*rsi + 10], 5
mov r12, qword ptr [rsp - 16]
vmovd xmm29, eax
movzx eax, word ptr [rdi + 2*rcx + 14]
mov rdi, qword ptr [rsp - 56]
vpinsrw xmm0, xmm0, word ptr [r13 + 2*rsi + 10], 6
vpinsrw xmm6, xmm6, word ptr [r12 + 2*rcx + 10], 4
vpinsrw xmm0, xmm0, word ptr [r10 + 2*rsi + 10], 7
mov r10, qword ptr [rsp - 112]
vpinsrw xmm6, xmm6, word ptr [rbp + 2*rcx + 10], 5
vpinsrw xmm6, xmm6, word ptr [r10 + 2*rcx + 10], 6
vpmovzxwq zmm0, xmm0
vpinsrw xmm6, xmm6, word ptr [rbx + 2*rcx + 10], 7
mov rbx, qword ptr [rsp - 88]
vpmovzxwq zmm6, xmm6
vpsubq zmm0, zmm0, zmm6
vmovd xmm6, eax
lea rax, [r9 + 2*rsi]
mov r9, qword ptr [rsp - 120]
vpsllq zmm0, zmm0, 32
vmovdqa xmmword ptr [rsp + 112], xmm6
vpaddq zmm15, zmm0, zmm4
vpinsrw xmm0, xmm28, word ptr [r14 + 2*rsi + 4], 1
vpinsrw xmm4, xmm23, word ptr [r11 + 2*rcx + 4], 1
mov qword ptr [rsp - 80], rax
movzx eax, word ptr [rax + 2*rsi]
vpinsrw xmm0, xmm0, word ptr [r9 + 2*rsi + 4], 2
vpinsrw xmm4, xmm4, word ptr [r8 + 2*rcx + 4], 2
vmovd xmm6, eax
mov rax, qword ptr [rsp - 24]
vpinsrw xmm0, xmm0, word ptr [r15 + 2*rsi + 4], 3
vpinsrw xmm4, xmm4, word ptr [rbx + 2*rcx + 4], 3
vpinsrw xmm0, xmm0, word ptr [rdx + 2*rsi + 4], 4
vpinsrw xmm4, xmm4, word ptr [r12 + 2*rcx + 4], 4
vpinsrw xmm0, xmm0, word ptr [rdi + 2*rsi + 4], 5
vpinsrw xmm4, xmm4, word ptr [rbp + 2*rcx + 4], 5
mov rbp, qword ptr [rsp + 8]
vpinsrw xmm0, xmm0, word ptr [r13 + 2*rsi + 4], 6
mov r13, r11
mov r11, qword ptr [rsp - 48]
vpinsrw xmm4, xmm4, word ptr [r10 + 2*rcx + 4], 6
vpinsrw xmm4, xmm4, word ptr [rax + 2*rcx + 4], 7
mov rax, qword ptr [rsp - 64]
vpinsrw xmm0, xmm0, word ptr [r11 + 2*rsi + 4], 7
lea r10, [rax + 2*rcx]
movzx eax, word ptr [r10 + 2*rcx]
mov qword ptr [rsp - 40], r10
vpmovzxwq zmm4, xmm4
vpmovzxwq zmm0, xmm0
vmovd xmm8, eax
vpsubq zmm0, zmm0, zmm4
vpinsrw xmm4, xmm17, word ptr [r14 + 2*rsi + 12], 1
vpinsrw xmm17, xmm19, word ptr [r13 + 2*rcx + 12], 1
mov r14, qword ptr [rsp - 128]
vpinsrw xmm4, xmm4, word ptr [r9 + 2*rsi + 12], 2
vpinsrw xmm17, xmm17, word ptr [r8 + 2*rcx + 12], 2
mov r8, qword ptr [rsp - 80]
vpinsrw xmm4, xmm4, word ptr [r15 + 2*rsi + 12], 3
vpinsrw xmm17, xmm17, word ptr [rbx + 2*rcx + 12], 3
mov rbx, qword ptr [rsp - 112]
mov r15, rdi
movzx eax, word ptr [r8 + 2*rsi + 8]
vpinsrw xmm4, xmm4, word ptr [rdx + 2*rsi + 12], 4
vpinsrw xmm17, xmm17, word ptr [r12 + 2*rcx + 12], 4
mov rdx, r11
vmovd xmm23, eax
movzx eax, word ptr [r10 + 2*rcx + 8]
mov r10, qword ptr [rsp - 96]
vpinsrw xmm4, xmm4, word ptr [rdi + 2*rsi + 12], 5
vpinsrw xmm17, xmm17, word ptr [r14 + 2*rcx + 12], 5
mov rdi, qword ptr [rsp - 104]
vmovd xmm19, eax
mov rax, qword ptr [rsp - 88]
vpinsrw xmm4, xmm4, word ptr [rbp + 2*rsi + 12], 6
vpinsrw xmm17, xmm17, word ptr [rbx + 2*rcx + 12], 6
vpinsrw xmm4, xmm4, word ptr [r11 + 2*rsi + 12], 7
mov r11, r13
mov r13, qword ptr [rsp - 24]
vpinsrw xmm17, xmm17, word ptr [r13 + 2*rcx + 12], 7
vpmovzxwq zmm4, xmm4
vpmovzxwq zmm17, xmm17
vpsubq zmm4, zmm4, zmm17
vpsllq zmm4, zmm4, 32
vpaddq zmm17, zmm4, zmm0
vmovdqa xmm0, xmmword ptr [rsp + 32]
vpinsrw xmm4, xmm14, word ptr [r11 + 2*rcx + 6], 1
vmovdqa xmm14, xmmword ptr [rsp + 48]
vpinsrw xmm0, xmm0, word ptr [rdi + 2*rsi + 6], 1
vpinsrw xmm14, xmm14, word ptr [rdi + 2*rsi + 14], 1
vpinsrw xmm0, xmm0, word ptr [r9 + 2*rsi + 6], 2
mov r9, qword ptr [rsp - 32]
vpinsrw xmm0, xmm0, word ptr [r9 + 2*rsi + 6], 3
vpinsrw xmm0, xmm0, word ptr [r10 + 2*rsi + 6], 4
vpinsrw xmm0, xmm0, word ptr [r15 + 2*rsi + 6], 5
vpinsrw xmm0, xmm0, word ptr [rbp + 2*rsi + 6], 6
vpinsrw xmm0, xmm0, word ptr [rdx + 2*rsi + 6], 7
mov rdx, r11
mov r11, qword ptr [rsp - 8]
vpinsrw xmm11, xmm11, word ptr [rdx + 2*rcx + 14], 1
vpinsrw xmm4, xmm4, word ptr [r11 + 2*rcx + 6], 2
vpinsrw xmm11, xmm11, word ptr [r11 + 2*rcx + 14], 2
vpmovzxwq zmm0, xmm0
vpinsrw xmm4, xmm4, word ptr [rax + 2*rcx + 6], 3
movzx eax, word ptr [r8 + 2*rsi + 2]
mov r8, qword ptr [rsp - 120]
vpinsrw xmm4, xmm4, word ptr [r12 + 2*rcx + 6], 4
vpinsrw xmm14, xmm14, word ptr [r8 + 2*rsi + 14], 2
vpinsrw xmm4, xmm4, word ptr [r14 + 2*rcx + 6], 5
vpinsrw xmm14, xmm14, word ptr [r9 + 2*rsi + 14], 3
vpinsrw xmm4, xmm4, word ptr [rbx + 2*rcx + 6], 6
vpinsrw xmm14, xmm14, word ptr [r10 + 2*rsi + 14], 4
vpinsrw xmm4, xmm4, word ptr [r13 + 2*rcx + 6], 7
vpinsrw xmm14, xmm14, word ptr [r15 + 2*rsi + 14], 5
vpinsrw xmm14, xmm14, word ptr [rbp + 2*rsi + 14], 6
vpmovzxwq zmm4, xmm4
vpsubq zmm4, zmm0, zmm4
vmovd xmm0, eax
lea rax, [rdi + 2*rsi]
lea rdi, [rdx + 2*rcx]
mov rdx, qword ptr [rsp - 88]
mov qword ptr [rsp - 104], rax
lea rax, [r8 + 2*rsi]
vpinsrw xmm13, xmm13, word ptr [rdi + 2*rcx], 1
mov r8, qword ptr [rsp - 104]
mov qword ptr [rsp + 48], rax
lea rax, [r9 + 2*rsi]
vpinsrw xmm11, xmm11, word ptr [rdx + 2*rcx + 14], 3
mov r9, qword ptr [rsp + 48]
mov qword ptr [rsp + 32], rax
lea rax, [r10 + 2*rsi]
mov r10, qword ptr [rsp + 32]
mov qword ptr [rsp + 96], rax
lea rax, [r15 + 2*rsi]
vpinsrw xmm16, xmm16, word ptr [r8 + 2*rsi], 1
vpinsrw xmm20, xmm21, word ptr [r8 + 2*rsi + 8], 1
vpinsrw xmm11, xmm11, word ptr [r12 + 2*rcx + 14], 4
mov r15, qword ptr [rsp + 96]
mov qword ptr [rsp + 88], rax
lea rax, [rbp + 2*rsi]
mov rbp, qword ptr [rsp - 40]
mov qword ptr [rsp - 56], rax
mov rax, qword ptr [rsp - 48]
vpinsrw xmm16, xmm16, word ptr [r9 + 2*rsi], 2
vpinsrw xmm20, xmm20, word ptr [r9 + 2*rsi + 8], 2
mov r14, qword ptr [rsp - 56]
vpinsrw xmm16, xmm16, word ptr [r10 + 2*rsi], 3
vpinsrw xmm20, xmm20, word ptr [r10 + 2*rsi + 8], 3
vpinsrw xmm14, xmm14, word ptr [rax + 2*rsi + 14], 7
lea rax, [rax + 2*rsi]
mov qword ptr [rsp - 96], rax
lea rax, [r11 + 2*rcx]
lea r11, [r13 + 2*rcx]
vpinsrw xmm16, xmm16, word ptr [r15 + 2*rsi], 4
vpinsrw xmm20, xmm20, word ptr [r15 + 2*rsi + 8], 4
mov qword ptr [rsp - 120], rax
lea rax, [rdx + 2*rcx]
lea rdx, [r12 + 2*rcx]
mov qword ptr [rsp - 112], r11
mov r8, qword ptr [rsp - 112]
mov qword ptr [rsp - 72], rax
mov rax, qword ptr [rsp - 128]
mov qword ptr [rsp - 64], rdx
vpmovzxwq zmm14, xmm14
vpinsrw xmm11, xmm11, word ptr [rax + 2*rcx + 14], 5
lea rax, [rax + 2*rcx]
mov qword ptr [rsp - 128], rax
mov rax, rbx
lea r12, [rax + 2*rcx]
mov rax, qword ptr [rsp - 80]
vpinsrw xmm11, xmm11, word ptr [rbx + 2*rcx + 14], 6
movzx ebx, word ptr [rbp + 2*rcx + 2]
mov qword ptr [rsp - 88], r12
movzx eax, word ptr [rax + 2*rsi + 10]
vpinsrw xmm11, xmm11, word ptr [r13 + 2*rcx + 14], 7
mov r13, qword ptr [rsp + 88]
vpinsrw xmm16, xmm16, word ptr [r13 + 2*rsi], 5
vpinsrw xmm20, xmm20, word ptr [r13 + 2*rsi + 8], 5
vpmovzxwq zmm11, xmm11
vpinsrw xmm16, xmm16, word ptr [r14 + 2*rsi], 6
vpinsrw xmm20, xmm20, word ptr [r14 + 2*rsi + 8], 6
mov r14, qword ptr [rsp - 96]
vpsubq zmm11, zmm14, zmm11
vmovd xmm14, ebx
mov rbx, rdi
mov rdi, qword ptr [rsp - 120]
vpinsrw xmm21, xmm24, word ptr [rbx + 2*rcx + 8], 1
mov qword ptr [rsp - 32], rbx
vpsllq zmm11, zmm11, 32
vpaddq zmm11, zmm11, zmm4
vmovd xmm4, eax
mov rax, qword ptr [rsp - 96]
vpinsrw xmm20, xmm20, word ptr [r14 + 2*rsi + 8], 7
vpinsrw xmm13, xmm13, word ptr [rdi + 2*rcx], 2
vpinsrw xmm21, xmm21, word ptr [rdi + 2*rcx + 8], 2
vpinsrw xmm16, xmm16, word ptr [rax + 2*rsi], 7
mov rax, qword ptr [rsp - 72]
vpmovzxwq zmm20, xmm20
vpinsrw xmm13, xmm13, word ptr [rax + 2*rcx], 3
vpinsrw xmm21, xmm21, word ptr [rax + 2*rcx + 8], 3
mov rax, qword ptr [rsp - 64]
vpmovzxwq zmm16, xmm16
vpinsrw xmm13, xmm13, word ptr [rdx + 2*rcx], 4
mov rdx, qword ptr [rsp - 128]
vpinsrw xmm21, xmm21, word ptr [rax + 2*rcx + 8], 4
mov rax, qword ptr [rsp - 80]
vpinsrw xmm13, xmm13, word ptr [rdx + 2*rcx], 5
vpinsrw xmm21, xmm21, word ptr [rdx + 2*rcx + 8], 5
mov rdx, rdi
vpinsrw xmm13, xmm13, word ptr [r12 + 2*rcx], 6
mov r12, rbx
mov rbx, qword ptr [rsp - 88]
vpinsrw xmm24, xmm30, word ptr [r12 + 2*rcx + 2], 1
mov r12, r8
vpinsrw xmm13, xmm13, word ptr [r11 + 2*rcx], 7
movzx r11d, word ptr [rbp + 2*rcx + 10]
vpinsrw xmm24, xmm24, word ptr [rdi + 2*rcx + 2], 2
mov rdi, r14
vpinsrw xmm21, xmm21, word ptr [rbx + 2*rcx + 8], 6
vpinsrw xmm21, xmm21, word ptr [r8 + 2*rcx + 8], 7
vpmovzxwq zmm13, xmm13
vpsubq zmm13, zmm16, zmm13
vmovd xmm16, r11d
movzx r11d, word ptr [rax + 2*rsi + 4]
mov rax, qword ptr [rsp - 104]
vpmovzxwq zmm21, xmm21
vpsubq zmm20, zmm20, zmm21
vmovd xmm25, r11d
movzx r11d, word ptr [rbp + 2*rcx + 4]
mov rbp, qword ptr [rsp - 128]
vpsllq zmm20, zmm20, 32
vpaddq zmm13, zmm20, zmm13
vmovdqa64 xmm20, xmmword ptr [rsp + 128]
vmovd xmm21, r11d
mov r11, qword ptr [rsp - 64]
vpinsrw xmm20, xmm20, word ptr [rax + 2*rsi + 2], 1
mov rax, qword ptr [rsp - 56]
vpinsrw xmm20, xmm20, word ptr [r9 + 2*rsi + 2], 2
vpinsrw xmm20, xmm20, word ptr [r10 + 2*rsi + 2], 3
vpinsrw xmm20, xmm20, word ptr [r15 + 2*rsi + 2], 4
vpinsrw xmm20, xmm20, word ptr [r13 + 2*rsi + 2], 5
vpinsrw xmm20, xmm20, word ptr [rax + 2*rsi + 2], 6
vpinsrw xmm20, xmm20, word ptr [r14 + 2*rsi + 2], 7
mov r14, qword ptr [rsp - 72]
vpinsrw xmm24, xmm24, word ptr [r14 + 2*rcx + 2], 3
vpmovzxwq zmm20, xmm20
vpinsrw xmm24, xmm24, word ptr [r11 + 2*rcx + 2], 4
vpinsrw xmm24, xmm24, word ptr [rbp + 2*rcx + 2], 5
vpinsrw xmm24, xmm24, word ptr [rbx + 2*rcx + 2], 6
vpinsrw xmm24, xmm24, word ptr [r8 + 2*rcx + 2], 7
mov r8, qword ptr [rsp - 80]
movzx r11d, word ptr [r8 + 2*rsi + 12]
vpmovzxwq zmm24, xmm24
vmovd xmm26, r11d
mov r11, qword ptr [rsp - 104]
vpsubq zmm20, zmm20, zmm24
vpinsrw xmm24, xmm31, word ptr [r11 + 2*rsi + 10], 1
vpinsrw xmm24, xmm24, word ptr [r9 + 2*rsi + 10], 2
vpinsrw xmm24, xmm24, word ptr [r10 + 2*rsi + 10], 3
vpinsrw xmm24, xmm24, word ptr [r15 + 2*rsi + 10], 4
vpinsrw xmm24, xmm24, word ptr [r13 + 2*rsi + 10], 5
vpinsrw xmm24, xmm24, word ptr [rax + 2*rsi + 10], 6
mov rax, qword ptr [rsp - 32]
vpinsrw xmm24, xmm24, word ptr [rdi + 2*rsi + 10], 7
mov rdi, qword ptr [rsp - 104]
vpinsrw xmm1, xmm1, word ptr [rax + 2*rcx + 10], 1
vpinsrw xmm18, xmm18, word ptr [rax + 2*rcx + 4], 1
vpinsrw xmm3, xmm3, word ptr [rax + 2*rcx + 12], 1
mov rax, qword ptr [rsp - 128]
vpinsrw xmm1, xmm1, word ptr [rdx + 2*rcx + 10], 2
mov rdx, qword ptr [rsp - 64]
vpinsrw xmm5, xmm5, word ptr [rdi + 2*rsi + 12], 1
vpinsrw xmm12, xmm12, word ptr [rdi + 2*rsi + 6], 1
vpmovzxwq zmm24, xmm24
vpinsrw xmm1, xmm1, word ptr [r14 + 2*rcx + 10], 3
mov r14, qword ptr [rsp - 120]
vpinsrw xmm1, xmm1, word ptr [rdx + 2*rcx + 10], 4
vpinsrw xmm18, xmm18, word ptr [r14 + 2*rcx + 4], 2
vpinsrw xmm3, xmm3, word ptr [r14 + 2*rcx + 12], 2
mov r14, qword ptr [rsp - 72]
vpinsrw xmm1, xmm1, word ptr [rbp + 2*rcx + 10], 5
mov rbp, qword ptr [rsp - 40]
vpinsrw xmm3, xmm3, word ptr [r14 + 2*rcx + 12], 3
vpinsrw xmm1, xmm1, word ptr [rbx + 2*rcx + 10], 6
movzx r11d, word ptr [rbp + 2*rcx + 12]
vpinsrw xmm1, xmm1, word ptr [r12 + 2*rcx + 10], 7
mov r12, qword ptr [rsp - 96]
vpmovzxwq zmm1, xmm1
vpsubq zmm1, zmm24, zmm1
vmovd xmm24, r11d
movzx r11d, word ptr [r8 + 2*rsi + 6]
mov r8, r9
vpinsrw xmm5, xmm5, word ptr [r8 + 2*rsi + 12], 2
vpinsrw xmm12, xmm12, word ptr [r8 + 2*rsi + 6], 2
vpsllq zmm1, zmm1, 32
vpaddq zmm1, zmm1, zmm20
vpinsrw xmm20, xmm27, word ptr [rdi + 2*rsi + 4], 1
vmovd xmm28, r11d
mov r11, qword ptr [rsp - 72]
vpinsrw xmm20, xmm20, word ptr [r9 + 2*rsi + 4], 2
mov r9, r10
vpinsrw xmm5, xmm5, word ptr [r9 + 2*rsi + 12], 3
vpinsrw xmm12, xmm12, word ptr [r9 + 2*rsi + 6], 3
vpinsrw xmm20, xmm20, word ptr [r10 + 2*rsi + 4], 3
mov r10, r15
vpinsrw xmm5, xmm5, word ptr [r10 + 2*rsi + 12], 4
vpinsrw xmm18, xmm18, word ptr [r11 + 2*rcx + 4], 3
movzx r11d, word ptr [rbp + 2*rcx + 6]
mov rbp, r12
vpinsrw xmm12, xmm12, word ptr [r10 + 2*rsi + 6], 4
vpinsrw xmm20, xmm20, word ptr [r15 + 2*rsi + 4], 4
mov r15, r13
vpinsrw xmm5, xmm5, word ptr [r15 + 2*rsi + 12], 5
vpinsrw xmm18, xmm18, word ptr [rdx + 2*rcx + 4], 4
mov rdx, qword ptr [rsp - 128]
vpinsrw xmm12, xmm12, word ptr [r15 + 2*rsi + 6], 5
vmovd xmm27, r11d
vpinsrw xmm20, xmm20, word ptr [r13 + 2*rsi + 4], 5
mov r13, qword ptr [rsp - 56]
vpinsrw xmm18, xmm18, word ptr [rdx + 2*rcx + 4], 5
mov rdx, qword ptr [rsp - 112]
vpinsrw xmm20, xmm20, word ptr [r13 + 2*rsi + 4], 6
vpinsrw xmm5, xmm5, word ptr [r13 + 2*rsi + 12], 6
vpinsrw xmm18, xmm18, word ptr [rbx + 2*rcx + 4], 6
vpinsrw xmm12, xmm12, word ptr [r13 + 2*rsi + 6], 6
vpinsrw xmm20, xmm20, word ptr [r12 + 2*rsi + 4], 7
vpinsrw xmm5, xmm5, word ptr [r12 + 2*rsi + 12], 7
mov r12, qword ptr [rsp - 64]
vpinsrw xmm18, xmm18, word ptr [rdx + 2*rcx + 4], 7
vpinsrw xmm3, xmm3, word ptr [r12 + 2*rcx + 12], 4
vpmovzxwq zmm20, xmm20
vpmovzxwq zmm18, xmm18
vpmovzxwq zmm5, xmm5
vpinsrw xmm3, xmm3, word ptr [rax + 2*rcx + 12], 5
mov rax, qword ptr [rsp - 80]
vpsubq zmm30, zmm20, zmm18
vpinsrw xmm18, xmm29, word ptr [rdi + 2*rsi + 14], 1
vpinsrw xmm3, xmm3, word ptr [rbx + 2*rcx + 12], 6
movzx r11d, word ptr [rax + 2*rsi + 14]
lea rax, [rdi + 2*rsi]
vpinsrw xmm6, xmm6, word ptr [rax + 2*rsi], 1
vpinsrw xmm23, xmm23, word ptr [rax + 2*rsi + 8], 1
vpinsrw xmm0, xmm0, word ptr [rax + 2*rsi + 2], 1
vpinsrw xmm4, xmm4, word ptr [rax + 2*rsi + 10], 1
vpinsrw xmm25, xmm25, word ptr [rax + 2*rsi + 4], 1
vpinsrw xmm26, xmm26, word ptr [rax + 2*rsi + 12], 1
vpinsrw xmm28, xmm28, word ptr [rax + 2*rsi + 6], 1
vpinsrw xmm18, xmm18, word ptr [r8 + 2*rsi + 14], 2
vpinsrw xmm3, xmm3, word ptr [rdx + 2*rcx + 12], 7
vpinsrw xmm18, xmm18, word ptr [r9 + 2*rsi + 14], 3
vpinsrw xmm18, xmm18, word ptr [r10 + 2*rsi + 14], 4
vpmovzxwq zmm3, xmm3
vpinsrw xmm18, xmm18, word ptr [r15 + 2*rsi + 14], 5
vpsubq zmm20, zmm5, zmm3
vpaddq zmm3, zmm7, zmm22
vpsubq zmm5, zmm22, zmm7
vmovd xmm7, r11d
vpinsrw xmm7, xmm7, word ptr [rax + 2*rsi + 14], 1
lea rax, [r8 + 2*rsi]
vpinsrw xmm6, xmm6, word ptr [rax + 2*rsi], 2
vpinsrw xmm23, xmm23, word ptr [rax + 2*rsi + 8], 2
vpinsrw xmm0, xmm0, word ptr [rax + 2*rsi + 2], 2
vpinsrw xmm4, xmm4, word ptr [rax + 2*rsi + 10], 2
vpinsrw xmm25, xmm25, word ptr [rax + 2*rsi + 4], 2
vpinsrw xmm26, xmm26, word ptr [rax + 2*rsi + 12], 2
vpinsrw xmm28, xmm28, word ptr [rax + 2*rsi + 6], 2
vpinsrw xmm18, xmm18, word ptr [r13 + 2*rsi + 14], 6
vpinsrw xmm7, xmm7, word ptr [rax + 2*rsi + 14], 2
lea rax, [r9 + 2*rsi]
vpinsrw xmm6, xmm6, word ptr [rax + 2*rsi], 3
vpinsrw xmm23, xmm23, word ptr [rax + 2*rsi + 8], 3
vpinsrw xmm0, xmm0, word ptr [rax + 2*rsi + 2], 3
vpinsrw xmm4, xmm4, word ptr [rax + 2*rsi + 10], 3
vpinsrw xmm25, xmm25, word ptr [rax + 2*rsi + 4], 3
vpinsrw xmm26, xmm26, word ptr [rax + 2*rsi + 12], 3
vpinsrw xmm28, xmm28, word ptr [rax + 2*rsi + 6], 3
vpinsrw xmm31, xmm18, word ptr [rbp + 2*rsi + 14], 7
vpinsrw xmm7, xmm7, word ptr [rax + 2*rsi + 14], 3
lea rax, [r10 + 2*rsi]
vpinsrw xmm6, xmm6, word ptr [rax + 2*rsi], 4
vpinsrw xmm23, xmm23, word ptr [rax + 2*rsi + 8], 4
vpinsrw xmm0, xmm0, word ptr [rax + 2*rsi + 2], 4
vpinsrw xmm4, xmm4, word ptr [rax + 2*rsi + 10], 4
vpinsrw xmm25, xmm25, word ptr [rax + 2*rsi + 4], 4
vpinsrw xmm26, xmm26, word ptr [rax + 2*rsi + 12], 4
vpinsrw xmm28, xmm28, word ptr [rax + 2*rsi + 6], 4
vpinsrw xmm7, xmm7, word ptr [rax + 2*rsi + 14], 4
lea rax, [r15 + 2*rsi]
vpinsrw xmm6, xmm6, word ptr [rax + 2*rsi], 5
vpinsrw xmm23, xmm23, word ptr [rax + 2*rsi + 8], 5
vpinsrw xmm0, xmm0, word ptr [rax + 2*rsi + 2], 5
vpinsrw xmm4, xmm4, word ptr [rax + 2*rsi + 10], 5
vpinsrw xmm25, xmm25, word ptr [rax + 2*rsi + 4], 5
vpinsrw xmm26, xmm26, word ptr [rax + 2*rsi + 12], 5
vpinsrw xmm28, xmm28, word ptr [rax + 2*rsi + 6], 5
vpinsrw xmm7, xmm7, word ptr [rax + 2*rsi + 14], 5
lea rax, [r13 + 2*rsi]
vpinsrw xmm22, xmm28, word ptr [rax + 2*rsi + 6], 6
vpinsrw xmm6, xmm6, word ptr [rax + 2*rsi], 6
vpinsrw xmm23, xmm23, word ptr [rax + 2*rsi + 8], 6
vpinsrw xmm0, xmm0, word ptr [rax + 2*rsi + 2], 6
vpinsrw xmm4, xmm4, word ptr [rax + 2*rsi + 10], 6
vpinsrw xmm29, xmm25, word ptr [rax + 2*rsi + 4], 6
vpinsrw xmm26, xmm26, word ptr [rax + 2*rsi + 12], 6
vpinsrw xmm28, xmm12, word ptr [rbp + 2*rsi + 6], 7
vpinsrw xmm2, xmm7, word ptr [rax + 2*rsi + 14], 6
lea rax, [rbp + 2*rsi]
vpinsrw xmm25, xmm23, word ptr [rax + 2*rsi + 8], 7
vpinsrw xmm23, xmm4, word ptr [rax + 2*rsi + 10], 7
vpinsrw xmm18, xmm29, word ptr [rax + 2*rsi + 4], 7
vpinsrw xmm12, xmm6, word ptr [rax + 2*rsi], 7
vpinsrw xmm6, xmm22, word ptr [rax + 2*rsi + 6], 7
vpinsrw xmm0, xmm0, word ptr [rax + 2*rsi + 2], 7
vpinsrw xmm7, xmm26, word ptr [rax + 2*rsi + 12], 7
vmovdqa64 xmm22, xmmword ptr [rsp + 112]
vpinsrw xmm4, xmm2, word ptr [rax + 2*rsi + 14], 7
mov rax, qword ptr [rsp - 40]
vpsllq zmm2, zmm20, 32
vmovdqa64 xmm20, xmmword ptr [rsp + 16]
vpaddq zmm29, zmm2, zmm30
vmovdqu64 zmm2, zmmword ptr [rsp + 144]
vpmovzxwq zmm30, xmm31
vpmovzxwq zmm28, xmm28
movzx eax, word ptr [rax + 2*rcx + 14]
vpmovzxwq zmm25, xmm25
vpmovzxwq zmm23, xmm23
vpmovzxwq zmm18, xmm18
vpmovzxwq zmm6, xmm6
vpmovzxwq zmm4, xmm4
vpaddq zmm26, zmm10, zmm2
vpsubq zmm10, zmm2, zmm10
vmovd xmm2, eax
mov rax, qword ptr [rsp - 32]
vpinsrw xmm20, xmm20, word ptr [rax + 2*rcx + 6], 1
vpinsrw xmm22, xmm22, word ptr [rax + 2*rcx + 14], 1
lea rax, [rax + 2*rcx]
vpinsrw xmm8, xmm8, word ptr [rax + 2*rcx], 1
vpinsrw xmm19, xmm19, word ptr [rax + 2*rcx + 8], 1
vpinsrw xmm14, xmm14, word ptr [rax + 2*rcx + 2], 1
vpinsrw xmm16, xmm16, word ptr [rax + 2*rcx + 10], 1
vpinsrw xmm21, xmm21, word ptr [rax + 2*rcx + 4], 1
vpinsrw xmm24, xmm24, word ptr [rax + 2*rcx + 12], 1
vpinsrw xmm27, xmm27, word ptr [rax + 2*rcx + 6], 1
vpinsrw xmm2, xmm2, word ptr [rax + 2*rcx + 14], 1
mov rax, qword ptr [rsp - 120]
vpinsrw xmm20, xmm20, word ptr [rax + 2*rcx + 6], 2
vpinsrw xmm22, xmm22, word ptr [rax + 2*rcx + 14], 2
lea rax, [rax + 2*rcx]
vpinsrw xmm8, xmm8, word ptr [rax + 2*rcx], 2
vpinsrw xmm19, xmm19, word ptr [rax + 2*rcx + 8], 2
vpinsrw xmm14, xmm14, word ptr [rax + 2*rcx + 2], 2
vpinsrw xmm16, xmm16, word ptr [rax + 2*rcx + 10], 2
vpinsrw xmm21, xmm21, word ptr [rax + 2*rcx + 4], 2
vpinsrw xmm24, xmm24, word ptr [rax + 2*rcx + 12], 2
vpinsrw xmm27, xmm27, word ptr [rax + 2*rcx + 6], 2
vpinsrw xmm2, xmm2, word ptr [rax + 2*rcx + 14], 2
lea rax, [r14 + 2*rcx]
vpinsrw xmm20, xmm20, word ptr [r14 + 2*rcx + 6], 3
vpinsrw xmm22, xmm22, word ptr [r14 + 2*rcx + 14], 3
vpinsrw xmm8, xmm8, word ptr [rax + 2*rcx], 3
vpinsrw xmm19, xmm19, word ptr [rax + 2*rcx + 8], 3
vpinsrw xmm14, xmm14, word ptr [rax + 2*rcx + 2], 3
vpinsrw xmm16, xmm16, word ptr [rax + 2*rcx + 10], 3
vpinsrw xmm21, xmm21, word ptr [rax + 2*rcx + 4], 3
vpinsrw xmm24, xmm24, word ptr [rax + 2*rcx + 12], 3
vpinsrw xmm27, xmm27, word ptr [rax + 2*rcx + 6], 3
vpinsrw xmm2, xmm2, word ptr [rax + 2*rcx + 14], 3
lea rax, [r12 + 2*rcx]
vpinsrw xmm20, xmm20, word ptr [r12 + 2*rcx + 6], 4
vpinsrw xmm22, xmm22, word ptr [r12 + 2*rcx + 14], 4
vpinsrw xmm8, xmm8, word ptr [rax + 2*rcx], 4
vpinsrw xmm19, xmm19, word ptr [rax + 2*rcx + 8], 4
vpinsrw xmm14, xmm14, word ptr [rax + 2*rcx + 2], 4
vpinsrw xmm16, xmm16, word ptr [rax + 2*rcx + 10], 4
vpinsrw xmm21, xmm21, word ptr [rax + 2*rcx + 4], 4
vpinsrw xmm24, xmm24, word ptr [rax + 2*rcx + 12], 4
vpinsrw xmm27, xmm27, word ptr [rax + 2*rcx + 6], 4
vpinsrw xmm2, xmm2, word ptr [rax + 2*rcx + 14], 4
mov rax, qword ptr [rsp - 128]
vpinsrw xmm20, xmm20, word ptr [rax + 2*rcx + 6], 5
vpinsrw xmm22, xmm22, word ptr [rax + 2*rcx + 14], 5
lea rax, [rax + 2*rcx]
vpinsrw xmm8, xmm8, word ptr [rax + 2*rcx], 5
vpinsrw xmm19, xmm19, word ptr [rax + 2*rcx + 8], 5
vpinsrw xmm14, xmm14, word ptr [rax + 2*rcx + 2], 5
vpinsrw xmm16, xmm16, word ptr [rax + 2*rcx + 10], 5
vpinsrw xmm21, xmm21, word ptr [rax + 2*rcx + 4], 5
vpinsrw xmm24, xmm24, word ptr [rax + 2*rcx + 12], 5
vpinsrw xmm27, xmm27, word ptr [rax + 2*rcx + 6], 5
vpinsrw xmm2, xmm2, word ptr [rax + 2*rcx + 14], 5
lea rax, [rbx + 2*rcx]
vpinsrw xmm20, xmm20, word ptr [rbx + 2*rcx + 6], 6
vpinsrw xmm22, xmm22, word ptr [rbx + 2*rcx + 14], 6
vpinsrw xmm8, xmm8, word ptr [rax + 2*rcx], 6
vpinsrw xmm19, xmm19, word ptr [rax + 2*rcx + 8], 6
vpinsrw xmm14, xmm14, word ptr [rax + 2*rcx + 2], 6
vpinsrw xmm16, xmm16, word ptr [rax + 2*rcx + 10], 6
vpinsrw xmm21, xmm21, word ptr [rax + 2*rcx + 4], 6
vpinsrw xmm24, xmm24, word ptr [rax + 2*rcx + 12], 6
vpinsrw xmm27, xmm27, word ptr [rax + 2*rcx + 6], 6
vpinsrw xmm2, xmm2, word ptr [rax + 2*rcx + 14], 6
lea rax, [rdx + 2*rcx]
vpinsrw xmm20, xmm20, word ptr [rdx + 2*rcx + 6], 7
vpinsrw xmm22, xmm22, word ptr [rdx + 2*rcx + 14], 7
vpinsrw xmm8, xmm8, word ptr [rax + 2*rcx], 7
vpinsrw xmm19, xmm19, word ptr [rax + 2*rcx + 8], 7
vpinsrw xmm16, xmm16, word ptr [rax + 2*rcx + 10], 7
vpinsrw xmm14, xmm14, word ptr [rax + 2*rcx + 2], 7
vpinsrw xmm21, xmm21, word ptr [rax + 2*rcx + 4], 7
vpinsrw xmm2, xmm2, word ptr [rax + 2*rcx + 14], 7
vpinsrw xmm24, xmm24, word ptr [rax + 2*rcx + 12], 7
vpinsrw xmm27, xmm27, word ptr [rax + 2*rcx + 6], 7
mov rax, qword ptr [rsp + 104]
add rax, -8
#and more...
```

Start by compiling the Godbolt reproducer with -O3 -march=znver5, then compare the default output with the -fno-vectorize and -unroll-full-max-count=0 cases. Trace the behavior back to the LoopFullUnroll, loop-vectorization, and SLP decisions; done means the default compilation no longer produces the substantially worse stride-vectorized code while preserving the reproducer's result.

Written by the indexing model from the issue text.