llvm / llvm/llvm-project

LLVM emits extra callee-saved registers

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#214,748 1 comment 0 reactions 1 assignee Claimed by @bojle View on GitHub
backend:AArch64 missed-optimization
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Description

See https://godbolt.org/z/KEP844fPo

This is extracted from SPEC2017's perlbench benchmark.

LLVM's output looks thus:

```asm
pp_and:
stp x29, x30, [sp, #-32]!
str x19, [sp, #16]
mov x29, sp
adrp x8, PL_sig_pending
ldr w8, [x8, :lo12:PL_sig_pending]
cbz w8, .LBB0_2
bl Perl_despatch_signals
.LBB0_2:
adrp x19, PL_stack_sp
ldr x8, [x19, :lo12:PL_stack_sp]
```

A CSR (x19) is assigned to the global variable PL_stack_sp, which adds an extra store to the prologue and an extra load to the epilogue, even though a caller-saved register which was available would have been sufficient.

GCC, on the other hand (as can be seen in the link) allocates a caller-saved register thereby forgoing the extra store and load.

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