[AMDGPU] Add LDS-backed VGPR spill/fill using DS ADDTID

AMDGPU targets starting with GFX9 support `DS_{READ,WRITE}_ADDTID_B32`, which provide per-lane LDS addressing without requiring an address VGPR. LLVM already models these instructions and handles the GFX9 M0-write hazard, but normal codegen does not use this. VGPR spills that cannot use the existing VGPR-to-AGPR mechanism are currently lowered to scratch memory.

The proposal is to add an LDS-backed destination for eligible VGPR spill/fill operations using the ADDTID instructions. The implementation should:
- Allocate spill storage after existing static LDS.
- Use only LDS that does not reduce current occupancy.
- Correctly manage M0, local-address-space memory operands, CFI, and resource metadata.
- Preserve scratch spilling as a fallback.

Previous LLVM attempt: https://reviews.llvm.org/D130784
Related Mesa ACO implementation: https://gitlab.freedesktop.org/mesa/mesa/-/commit/133ef9f94b561ff3b0e8ed0dbb85a9e2fa024ac3

Start by reading the previous LLVM attempt in D130784 and the related Mesa ACO implementation linked in the issue. Trace how LLVM models DS_{READ,WRITE}_ADDTID_B32 and handles the GFX9 M0-write hazard. Done means eligible VGPR spills use occupancy-safe LDS storage with correct M0, address-space operands, CFI, and resource metadata, while scratch spilling remains the fallback.

Written by the indexing model from the issue text.