[LV][X86] terrible autovectorization creates huge numbers of extractelement/insertelement
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Description
found from https://github.com/zhongflyTeam/libbluray/blob/8b4fb6e2562bb86601ea5a2c4140af6d8f3f1cf4/src/util/strutl.c#L113-L124
```c
#include
char *str_print_hex(char *out, const uint8_t *buf, int count)
{
static const char nibble[16] = "0123456789abcdef";
int zz;
for (zz = 0; zz < count; zz++) {
out[zz*2 ] = nibble[(buf[zz] >> 4) & 0xf];
out[zz*2 + 1] = nibble[buf[zz] & 0x0f];
}
out[zz*2] = 0;
return out;
}
```
```asm
str_print_hex:
movq %rdi, %rax
testl %edx, %edx
jle .LBB0_3
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movl %edx, %r15d
cmpl $8, %edx
jb .LBB0_2
leaq (%rsi,%r15), %rdi
leaq (%rax,%r15,2), %rcx
cmpq %rdi, %rax
setb %dil
cmpq %rcx, %rsi
setb %cl
testb %cl, %dil
je .LBB0_6
.LBB0_2:
xorl %r13d, %r13d
.LBB0_15:
movq %r15, %rcx
andq $7, %rcx
movq %r13, %r8
je .LBB0_18
leaq str_print_hex.nibble(%rip), %r9
movq %r13, %r8
.LBB0_17:
movzbl (%rsi,%r8), %edi
shrl $4, %edi
movzbl (%rdi,%r9), %edi
movb %dil, (%rax,%r8,2)
movzbl (%rsi,%r8), %edi
andl $15, %edi
movzbl (%rdi,%r9), %edi
movb %dil, 1(%rax,%r8,2)
incq %r8
decq %rcx
jne .LBB0_17
.LBB0_18:
subq %r15, %r13
cmpq $-8, %r13
ja .LBB0_21
leaq str_print_hex.nibble(%rip), %rdi
.LBB0_20:
movzbl (%rsi,%r8), %ecx
shrl $4, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, (%rax,%r8,2)
movzbl (%rsi,%r8), %ecx
andl $15, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 1(%rax,%r8,2)
movzbl 1(%rsi,%r8), %ecx
shrl $4, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 2(%rax,%r8,2)
movzbl 1(%rsi,%r8), %ecx
andl $15, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 3(%rax,%r8,2)
movzbl 2(%rsi,%r8), %ecx
shrl $4, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 4(%rax,%r8,2)
movzbl 2(%rsi,%r8), %ecx
andl $15, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 5(%rax,%r8,2)
movzbl 3(%rsi,%r8), %ecx
shrl $4, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 6(%rax,%r8,2)
movzbl 3(%rsi,%r8), %ecx
andl $15, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 7(%rax,%r8,2)
movzbl 4(%rsi,%r8), %ecx
shrl $4, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 8(%rax,%r8,2)
movzbl 4(%rsi,%r8), %ecx
andl $15, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 9(%rax,%r8,2)
movzbl 5(%rsi,%r8), %ecx
shrl $4, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 10(%rax,%r8,2)
movzbl 5(%rsi,%r8), %ecx
andl $15, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 11(%rax,%r8,2)
movzbl 6(%rsi,%r8), %ecx
shrl $4, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 12(%rax,%r8,2)
movzbl 6(%rsi,%r8), %ecx
andl $15, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 13(%rax,%r8,2)
movzbl 7(%rsi,%r8), %ecx
shrl $4, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 14(%rax,%r8,2)
movzbl 7(%rsi,%r8), %ecx
andl $15, %ecx
movzbl (%rcx,%rdi), %ecx
movb %cl, 15(%rax,%r8,2)
addq $8, %r8
cmpq %r8, %r15
jne .LBB0_20
.LBB0_21:
addl %edx, %edx
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
movb $0, (%rax,%rdx)
vzeroupper
retq
.LBB0_3:
xorl %edx, %edx
movb $0, (%rax,%rdx)
retq
.LBB0_6:
cmpl $64, %edx
jae .LBB0_8
xorl %r13d, %r13d
jmp .LBB0_12
.LBB0_8:
vbroadcasti32x4 .LCPI0_3(%rip), %zmm0
vbroadcasti32x4 .LCPI0_5(%rip), %zmm1
vmovdqa64 .LCPI0_2(%rip), %zmm2
movl %r15d, %r13d
andl $2147483584, %r13d
leaq str_print_hex.nibble(%rip), %r9
xorl %r8d, %r8d
.LBB0_9:
vmovdqu64 (%rsi,%r8), %zmm7
vgf2p8affineqb $0, %zmm0, %zmm7, %zmm6
vextracti64x4 $1, %zmm6, %ymm4
vextracti128 $1, %ymm4, %xmm3
vpmovzxbw %xmm3, %ymm5
vpmovzxwq %xmm5, %zmm11
vextracti128 $1, %ymm5, %xmm3
vpmovzxbw %xmm4, %ymm5
vpmovzxwq %xmm3, %zmm3
vpmovzxwq %xmm5, %zmm10
vextracti128 $1, %ymm5, %xmm4
vextracti128 $1, %ymm6, %xmm5
vpmovzxwq %xmm4, %zmm4
vpmovzxbw %xmm5, %ymm8
vmovd %xmm11, %r10d
vpextrq $1, %xmm11, %rcx
vextracti128 $1, %ymm11, %xmm12
movzbl (%r10,%r9), %r10d
vpmovzxwq %xmm8, %zmm9
vextracti128 $1, %ymm8, %xmm5
vpmovzxbw %xmm6, %ymm8
vpmovzxwq %xmm5, %zmm5
vextracti128 $1, %ymm8, %xmm6
vpmovzxwq %xmm8, %zmm8
vpmovzxwq %xmm6, %zmm6
vmovd %r10d, %xmm13
vpinsrb $1, (%rcx,%r9), %xmm13, %xmm13
vmovd %xmm12, %r10d
vpextrq $1, %xmm12, %rcx
vextracti32x4 $2, %zmm11, %xmm12
vextracti32x4 $3, %zmm11, %xmm11
vpextrq $1, %xmm8, %rdi
vpinsrb $2, (%r10,%r9), %xmm13, %xmm13
vmovd %xmm12, %r10d
vpinsrb $3, (%rcx,%r9), %xmm13, %xmm13
vpextrq $1, %xmm12, %rcx
vpinsrb $4, (%r10,%r9), %xmm13, %xmm12
vmovd %xmm11, %r10d
vpinsrb $5, (%rcx,%r9), %xmm12, %xmm12
vpextrq $1, %xmm11, %rcx
vpinsrb $6, (%r10,%r9), %xmm12, %xmm11
vmovd %xmm3, %r10d
vextracti128 $1, %ymm3, %xmm12
vpinsrb $7, (%rcx,%r9), %xmm11, %xmm11
vpextrq $1, %xmm3, %rcx
vpinsrb $8, (%r10,%r9), %xmm11, %xmm11
vmovd %xmm12, %r10d
vpinsrb $9, (%rcx,%r9), %xmm11, %xmm11
vpextrq $1, %xmm12, %rcx
vextracti32x4 $2, %zmm3, %xmm12
vextracti32x4 $3, %zmm3, %xmm3
vpinsrb $10, (%r10,%r9), %xmm11, %xmm11
vmovd %xmm12, %r10d
vpinsrb $11, (%rcx,%r9), %xmm11, %xmm11
vpextrq $1, %xmm12, %rcx
vpinsrb $12, (%r10,%r9), %xmm11, %xmm11
vmovd %xmm3, %r10d
vpinsrb $13, (%rcx,%r9), %xmm11, %xmm11
vpextrq $1, %xmm3, %rcx
vpinsrb $14, (%r10,%r9), %xmm11, %xmm3
vmovd %xmm10, %r10d
vextracti128 $1, %ymm10, %xmm11
movzbl (%r10,%r9), %r10d
vpinsrb $15, (%rcx,%r9), %xmm3, %xmm3
vpextrq $1, %xmm10, %rcx
vmovd %r10d, %xmm12
vpinsrb $1, (%rcx,%r9), %xmm12, %xmm12
vmovd %xmm11, %r10d
vpextrq $1, %xmm11, %rcx
vextracti32x4 $2, %zmm10, %xmm11
vextracti32x4 $3, %zmm10, %xmm10
vpextrq $1, %xmm10, %r11
vpinsrb $2, (%r10,%r9), %xmm12, %xmm12
vmovd %xmm11, %r10d
vpinsrb $3, (%rcx,%r9), %xmm12, %xmm12
vpextrq $1, %xmm11, %rcx
vpinsrb $4, (%r10,%r9), %xmm12, %xmm11
vmovd %xmm10, %r10d
vpinsrb $5, (%rcx,%r9), %xmm11, %xmm11
vmovd %xmm8, %ecx
movzbl (%rcx,%r9), %ecx
vpinsrb $6, (%r10,%r9), %xmm11, %xmm10
vmovd %xmm4, %r10d
vextracti128 $1, %ymm4, %xmm11
vpinsrb $7, (%r11,%r9), %xmm10, %xmm10
vpextrq $1, %xmm9, %r11
vpinsrb $8, (%r10,%r9), %xmm10, %xmm10
vpextrq $1, %xmm4, %r10
vpinsrb $9, (%r10,%r9), %xmm10, %xmm10
vmovd %xmm11, %r10d
vpinsrb $10, (%r10,%r9), %xmm10, %xmm10
vpextrq $1, %xmm11, %r10
vextracti32x4 $2, %zmm4, %xmm11
vextracti32x4 $3, %zmm4, %xmm4
vpinsrb $11, (%r10,%r9), %xmm10, %xmm10
vmovd %xmm11, %r10d
vpinsrb $12, (%r10,%r9), %xmm10, %xmm10
vpextrq $1, %xmm11, %r10
vextracti128 $1, %ymm9, %xmm11
vpinsrb $13, (%r10,%r9), %xmm10, %xmm10
vmovd %xmm4, %r10d
vpinsrb $14, (%r10,%r9), %xmm10, %xmm10
vpextrq $1, %xmm4, %r10
vpinsrb $15, (%r10,%r9), %xmm10, %xmm4
vmovd %xmm9, %r10d
movzbl (%r10,%r9), %r10d
vmovd %r10d, %xmm10
vpinsrb $1, (%r11,%r9), %xmm10, %xmm10
vmovd %xmm11, %r10d
vinserti128 $1, %xmm3, %ymm4, %ymm3
vpinsrb $2, (%r10,%r9), %xmm10, %xmm10
vpextrq $1, %xmm11, %r10
vextracti32x4 $2, %zmm9, %xmm11
vextracti32x4 $3, %zmm9, %xmm9
vpinsrb $3, (%r10,%r9), %xmm10, %xmm10
vmovd %xmm11, %r10d
vpinsrb $4, (%r10,%r9), %xmm10, %xmm10
vpextrq $1, %xmm11, %r10
vpinsrb $5, (%r10,%r9), %xmm10, %xmm10
vmovd %xmm9, %r10d
vpinsrb $6, (%r10,%r9), %xmm10, %xmm10
vpextrq $1, %xmm9, %r10
vpinsrb $7, (%r10,%r9), %xmm10, %xmm9
vmovd %xmm5, %r10d
vextracti128 $1, %ymm5, %xmm10
vpinsrb $8, (%r10,%r9), %xmm9, %xmm9
vpextrq $1, %xmm5, %r10
vpinsrb $9, (%r10,%r9), %xmm9, %xmm9
vmovd %xmm10, %r10d
vpinsrb $10, (%r10,%r9), %xmm9, %xmm9
vpextrq $1, %xmm10, %r10
vextracti32x4 $2, %zmm5, %xmm10
vextracti32x4 $3, %zmm5, %xmm5
vpinsrb $11, (%r10,%r9), %xmm9, %xmm9
vmovd %xmm10, %r10d
vpinsrb $12, (%r10,%r9), %xmm9, %xmm9
vpextrq $1, %xmm10, %r10
vmovd %ecx, %xmm10
vpinsrb $1, (%rdi,%r9), %xmm10, %xmm10
vpinsrb $13, (%r10,%r9), %xmm9, %xmm9
vmovd %xmm5, %r10d
vpinsrb $14, (%r10,%r9), %xmm9, %xmm9
vpextrq $1, %xmm5, %r10
vpinsrb $15, (%r10,%r9), %xmm9, %xmm5
vextracti128 $1, %ymm8, %xmm9
vmovd %xmm9, %ecx
vpextrq $1, %xmm9, %r10
vextracti32x4 $2, %zmm8, %xmm9
vextracti32x4 $3, %zmm8, %xmm8
vpinsrb $2, (%rcx,%r9), %xmm10, %xmm10
vmovd %xmm9, %ecx
vpinsrb $3, (%r10,%r9), %xmm10, %xmm10
vpextrq $1, %xmm9, %r10
vpinsrb $4, (%rcx,%r9), %xmm10, %xmm9
vmovd %xmm8, %ecx
vpinsrb $5, (%r10,%r9), %xmm9, %xmm9
vpextrq $1, %xmm8, %r10
vpinsrb $6, (%rcx,%r9), %xmm9, %xmm8
vmovd %xmm6, %ecx
vextracti128 $1, %ymm6, %xmm9
vpinsrb $7, (%r10,%r9), %xmm8, %xmm8
vpextrq $1, %xmm6, %r10
vpinsrb $8, (%rcx,%r9), %xmm8, %xmm8
vmovd %xmm9, %ecx
vpinsrb $9, (%r10,%r9), %xmm8, %xmm8
vpextrq $1, %xmm9, %r10
vextracti32x4 $2, %zmm6, %xmm9
vextracti32x4 $3, %zmm6, %xmm6
vpinsrb $10, (%rcx,%r9), %xmm8, %xmm8
vmovd %xmm9, %ecx
vpinsrb $11, (%r10,%r9), %xmm8, %xmm8
vpextrq $1, %xmm9, %r10
vpinsrb $12, (%rcx,%r9), %xmm8, %xmm8
vmovd %xmm6, %ecx
vpinsrb $13, (%r10,%r9), %xmm8, %xmm8
vpextrq $1, %xmm6, %r10
vpinsrb $14, (%rcx,%r9), %xmm8, %xmm6
vpandq %zmm1, %zmm7, %zmm8
vextracti64x4 $1, %zmm8, %ymm7
vextracti128 $1, %ymm7, %xmm9
vpmovzxbw %xmm9, %ymm9
vpinsrb $15, (%r10,%r9), %xmm6, %xmm6
vpmovzxwq %xmm9, %zmm11
vextracti128 $1, %ymm9, %xmm10
vpmovzxbw %xmm7, %ymm9
vpmovzxwq %xmm10, %zmm10
vextracti128 $1, %ymm9, %xmm7
vpmovzxwq %xmm9, %zmm9
vpmovzxwq %xmm7, %zmm7
vmovd %xmm11, %r10d
vpextrq $1, %xmm11, %rcx
vextracti128 $1, %ymm11, %xmm12
movzbl (%r10,%r9), %r10d
vinserti128 $1, %xmm5, %ymm6, %ymm4
vmovd %r10d, %xmm13
vpinsrb $1, (%rcx,%r9), %xmm13, %xmm13
vmovd %xmm12, %ecx
vpextrq $1, %xmm12, %r10
vextracti32x4 $2, %zmm11, %xmm12
vextracti32x4 $3, %zmm11, %xmm11
vpextrq $1, %xmm12, %r11
vpinsrb $2, (%rcx,%r9), %xmm13, %xmm13
vmovd %xmm12, %ecx
vextracti128 $1, %ymm8, %xmm12
vpmovzxbw %xmm8, %ymm8
vpmovzxbw %xmm12, %ymm12
vpinsrb $3, (%r10,%r9), %xmm13, %xmm13
vmovd %xmm11, %r10d
vpinsrb $4, (%rcx,%r9), %xmm13, %xmm13
vpextrq $1, %xmm9, %rcx
vpinsrb $5, (%r11,%r9), %xmm13, %xmm13
vpinsrb $6, (%r10,%r9), %xmm13, %xmm13
vpextrq $1, %xmm11, %r10
vpinsrb $7, (%r10,%r9), %xmm13, %xmm11
vmovd %xmm10, %r10d
vextracti128 $1, %ymm10, %xmm13
vpinsrb $8, (%r10,%r9), %xmm11, %xmm11
vpextrq $1, %xmm10, %r10
vpinsrb $9, (%r10,%r9), %xmm11, %xmm11
vmovd %xmm13, %r10d
vpinsrb $10, (%r10,%r9), %xmm11, %xmm11
vpextrq $1, %xmm13, %r10
vextracti32x4 $2, %zmm10, %xmm13
vextracti32x4 $3, %zmm10, %xmm10
vpinsrb $11, (%r10,%r9), %xmm11, %xmm11
vmovd %xmm13, %r10d
vpinsrb $12, (%r10,%r9), %xmm11, %xmm11
vpextrq $1, %xmm13, %r10
vpinsrb $13, (%r10,%r9), %xmm11, %xmm11
vmovd %xmm10, %r10d
vpinsrb $14, (%r10,%r9), %xmm11, %xmm11
vpextrq $1, %xmm10, %r10
vpinsrb $15, (%r10,%r9), %xmm11, %xmm10
vmovd %xmm9, %r10d
vextracti128 $1, %ymm9, %xmm11
movzbl (%r10,%r9), %r10d
vmovd %r10d, %xmm13
vpinsrb $1, (%rcx,%r9), %xmm13, %xmm13
vmovd %xmm11, %r10d
vpextrq $1, %xmm11, %rcx
vextracti32x4 $2, %zmm9, %xmm11
vextracti32x4 $3, %zmm9, %xmm9
vpinsrb $2, (%r10,%r9), %xmm13, %xmm13
vmovd %xmm11, %r10d
vpinsrb $3, (%rcx,%r9), %xmm13, %xmm13
vpextrq $1, %xmm11, %rcx
vextracti128 $1, %ymm12, %xmm11
vpmovzxwq %xmm12, %zmm12
vpmovzxwq %xmm11, %zmm11
vpinsrb $4, (%r10,%r9), %xmm13, %xmm13
vmovd %xmm9, %r10d
vpinsrb $5, (%rcx,%r9), %xmm13, %xmm13
vpextrq $1, %xmm9, %rcx
vpinsrb $6, (%r10,%r9), %xmm13, %xmm9
vmovd %xmm7, %r10d
vextracti128 $1, %ymm7, %xmm13
vpinsrb $7, (%rcx,%r9), %xmm9, %xmm9
vpextrq $1, %xmm7, %rcx
vpinsrb $8, (%r10,%r9), %xmm9, %xmm9
vmovd %xmm13, %r10d
vpinsrb $9, (%rcx,%r9), %xmm9, %xmm9
vpextrq $1, %xmm13, %rcx
vextracti32x4 $2, %zmm7, %xmm13
vextracti32x4 $3, %zmm7, %xmm7
vpinsrb $10, (%r10,%r9), %xmm9, %xmm9
vmovd %xmm13, %r10d
vpinsrb $11, (%rcx,%r9), %xmm9, %xmm9
vpextrq $1, %xmm13, %rcx
vpinsrb $12, (%r10,%r9), %xmm9, %xmm9
vmovd %xmm7, %r10d
vpinsrb $13, (%rcx,%r9), %xmm9, %xmm9
vpextrq $1, %xmm7, %rcx
vpinsrb $14, (%r10,%r9), %xmm9, %xmm7
vmovd %xmm12, %r10d
vextracti128 $1, %ymm12, %xmm9
movzbl (%r10,%r9), %r10d
vpinsrb $15, (%rcx,%r9), %xmm7, %xmm7
vpextrq $1, %xmm12, %rcx
vmovd %r10d, %xmm13
vpinsrb $1, (%rcx,%r9), %xmm13, %xmm13
vmovd %xmm9, %r10d
vpextrq $1, %xmm9, %rcx
vextracti32x4 $2, %zmm12, %xmm9
vextracti32x4 $3, %zmm12, %xmm12
vpinsrb $2, (%r10,%r9), %xmm13, %xmm13
vmovd %xmm9, %r10d
vinserti128 $1, %xmm10, %ymm7, %ymm5
vpermt2b %zmm5, %zmm2, %zmm3
vpinsrb $3, (%rcx,%r9), %xmm13, %xmm13
vpextrq $1, %xmm9, %rcx
vextracti128 $1, %ymm8, %xmm9
vpmovzxwq %xmm8, %zmm8
vpmovzxwq %xmm9, %zmm9
vpinsrb $4, (%r10,%r9), %xmm13, %xmm13
vmovd %xmm8, %r10d
vpextrq $1, %xmm8, %rdi
movzbl (%r10,%r9), %r10d
vpinsrb $5, (%rcx,%r9), %xmm13, %xmm13
vmovd %xmm12, %ecx
vpinsrb $6, (%rcx,%r9), %xmm13, %xmm13
vpextrq $1, %xmm12, %rcx
vpinsrb $7, (%rcx,%r9), %xmm13, %xmm12
vmovd %xmm11, %ecx
vextracti128 $1, %ymm11, %xmm13
vpinsrb $8, (%rcx,%r9), %xmm12, %xmm12
vpextrq $1, %xmm11, %rcx
vpinsrb $9, (%rcx,%r9), %xmm12, %xmm12
vmovd %xmm13, %ecx
vpinsrb $10, (%rcx,%r9), %xmm12, %xmm12
vpextrq $1, %xmm13, %rcx
vextracti32x4 $2, %zmm11, %xmm13
vextracti32x4 $3, %zmm11, %xmm11
vpinsrb $11, (%rcx,%r9), %xmm12, %xmm12
vmovd %xmm13, %ecx
vpinsrb $12, (%rcx,%r9), %xmm12, %xmm12
vpextrq $1, %xmm13, %rcx
vmovd %r10d, %xmm13
vpinsrb $1, (%rdi,%r9), %xmm13, %xmm13
vpinsrb $13, (%rcx,%r9), %xmm12, %xmm12
vmovd %xmm11, %ecx
vpinsrb $14, (%rcx,%r9), %xmm12, %xmm12
vpextrq $1, %xmm11, %rcx
vpinsrb $15, (%rcx,%r9), %xmm12, %xmm11
vextracti128 $1, %ymm8, %xmm12
vmovd %xmm12, %ecx
vpextrq $1, %xmm12, %r10
vextracti32x4 $2, %zmm8, %xmm12
vextracti32x4 $3, %zmm8, %xmm8
vpinsrb $2, (%rcx,%r9), %xmm13, %xmm13
vpextrq $1, %xmm12, %rcx
vpinsrb $3, (%r10,%r9), %xmm13, %xmm13
vmovd %xmm12, %r10d
vpinsrb $4, (%r10,%r9), %xmm13, %xmm12
vpextrq $1, %xmm8, %r10
vpinsrb $5, (%rcx,%r9), %xmm12, %xmm12
vmovd %xmm8, %ecx
vpinsrb $6, (%rcx,%r9), %xmm12, %xmm8
vmovd %xmm9, %ecx
vextracti128 $1, %ymm9, %xmm12
vpinsrb $7, (%r10,%r9), %xmm8, %xmm8
vpextrq $1, %xmm9, %r10
vpinsrb $8, (%rcx,%r9), %xmm8, %xmm8
vmovd %xmm12, %ecx
vpinsrb $9, (%r10,%r9), %xmm8, %xmm8
vpextrq $1, %xmm12, %r10
vextracti32x4 $2, %zmm9, %xmm12
vextracti32x4 $3, %zmm9, %xmm9
vpinsrb $10, (%rcx,%r9), %xmm8, %xmm8
vmovd %xmm12, %ecx
vpinsrb $11, (%r10,%r9), %xmm8, %xmm8
vpextrq $1, %xmm12, %r10
vpinsrb $12, (%rcx,%r9), %xmm8, %xmm8
vmovd %xmm9, %ecx
vpinsrb $13, (%r10,%r9), %xmm8, %xmm8
vpextrq $1, %xmm9, %r10
vpinsrb $14, (%rcx,%r9), %xmm8, %xmm8
vpinsrb $15, (%r10,%r9), %xmm8, %xmm8
vmovdqu64 %zmm3, 64(%rax,%r8,2)
vinserti128 $1, %xmm11, %ymm8, %ymm6
vpermt2b %zmm6, %zmm2, %zmm4
vmovdqu64 %zmm4, (%rax,%r8,2)
addq $64, %r8
cmpq %r8, %r13
jne .LBB0_9
cmpl %r15d, %r13d
je .LBB0_21
testb $56, %r15b
je .LBB0_15
.LBB0_12:
vpbroadcastq .LCPI0_6(%rip), %xmm0
vpbroadcastb .LCPI0_7(%rip), %xmm1
movq %r13, %r8
movl %r15d, %r13d
andl $2147483640, %r13d
movl $2096, %r9d
movl $2088, %r10d
movl $2080, %r11d
movl $2064, %ebp
leaq str_print_hex.nibble(%rip), %r14
.LBB0_13:
vmovq (%rsi,%r8), %xmm2
vgf2p8affineqb $0, %xmm0, %xmm2, %xmm3
vpand %xmm1, %xmm2, %xmm2
vmovq %xmm2, %rbx
vmovq %xmm3, %rcx
movzbl %cl, %r12d
movzbl %ch, %edi
movzbl (%r12,%r14), %r12d
vmovd %r12d, %xmm2
movzbl %bl, %r12d
vpinsrb $1, (%r12,%r14), %xmm2, %xmm2
vpinsrb $2, (%rdi,%r14), %xmm2, %xmm2
movzbl %bh, %edi
vpinsrb $3, (%rdi,%r14), %xmm2, %xmm2
bextrl %ebp, %ecx, %edi
vpinsrb $4, (%rdi,%r14), %xmm2, %xmm2
bextrl %ebp, %ebx, %edi
vpinsrb $5, (%rdi,%r14), %xmm2, %xmm2
movl %ecx, %edi
shrl $24, %edi
vpinsrb $6, (%rdi,%r14), %xmm2, %xmm2
movl %ebx, %edi
shrl $24, %edi
vpinsrb $7, (%rdi,%r14), %xmm2, %xmm2
bextrq %r11, %rcx, %rdi
vpinsrb $8, (%rdi,%r14), %xmm2, %xmm2
bextrq %r11, %rbx, %rdi
vpinsrb $9, (%rdi,%r14), %xmm2, %xmm2
bextrq %r10, %rcx, %rdi
vpinsrb $10, (%rdi,%r14), %xmm2, %xmm2
bextrq %r10, %rbx, %rdi
vpinsrb $11, (%rdi,%r14), %xmm2, %xmm2
bextrq %r9, %rcx, %rdi
shrq $56, %rcx
vpinsrb $12, (%rdi,%r14), %xmm2, %xmm2
bextrq %r9, %rbx, %rdi
shrq $56, %rbx
vpinsrb $13, (%rdi,%r14), %xmm2, %xmm2
vpinsrb $14, (%rcx,%r14), %xmm2, %xmm2
vpinsrb $15, (%rbx,%r14), %xmm2, %xmm2
vmovdqu %xmm2, (%rax,%r8,2)
addq $8, %r8
cmpq %r8, %r13
jne .LBB0_13
cmpl %r15d, %r13d
je .LBB0_21
jmp .LBB0_15
str_print_hex.nibble:
.ascii "0123456789abcdef"
```
https://godbolt.org/z/z4jda7Ma9
Contributor guide
Research direction
Start with the str_print_hex example from src/util/strutl.c lines 113-124 and compare its generated X86 assembly with the reported output. Investigate the autovectorization path that produces the extractelement/insertelement-heavy sequence. Done means the compiler no longer produces the reported excessive extraction and insertion operations for this case, with behavior preserved.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- c
- Domain
- compilers, performance
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Quiet
- Clarity
- Mostly clear
- Newbie friendliness
- 48/100