llvm-tblgen reg handling speedup

I looked at performance of the two worst offenders (amdgpu register bank emission
and register info). It seems to me that the way to get superregs is very slow.

It creates a bitvector of *all* register classes in a set. Then uses it once
(register bank emission) or a very few times. Perhaps it's meant to be cached,
no idea.

I removed this weirdness and got some very nice speedup (~70x for reg bank
emission, and ~10x for register info).

Start in llvm-tblgen's superregister handling, focusing on AMDGPU register bank emission and register info, which the issue identifies as the main offenders. Profile the current bitvector construction and compare the affected operations with the proposed simpler approach. Done means preserving register handling while reproducing the reported speedups for register bank emission and register info.

Written by the indexing model from the issue text.