[InstCombine][VectorCombine] icmp + sext is better than icmp + zext on vectors with -O3

[Godbolt](https://godbolt.org/z/3MKE3zjvE)
Original C code
```c
typedef int type __attribute__ ((vector_size (32)));

type src (type a) {
return 1 >> a;
}

type tgt (type a) {
return a == 0;
}
```

```llvm
define dso_local range(i32 0, 2) <8 x i32> @src(<8 x i32> noundef %a) local_unnamed_addr {
entry:
%0 = icmp eq <8 x i32> %a, zeroinitializer
%shr = zext <8 x i1> %0 to <8 x i32>
ret <8 x i32> %shr
}

define dso_local range(i32 -1, 1) <8 x i32> @tgt(<8 x i32> noundef %a) local_unnamed_addr {
entry:
%cmp = icmp eq <8 x i32> %a, zeroinitializer
%sext = sext <8 x i1> %cmp to <8 x i32>
ret <8 x i32> %sext
}
```

```asm
src:
vpxor xmm1, xmm1, xmm1
vpcmpeqd ymm0, ymm0, ymm1
vpsrld ymm0, ymm0, 31
ret

tgt:
vpxor xmm1, xmm1, xmm1
vpcmpeqd ymm0, ymm0, ymm1
ret
```

It also applies to other vectors but not limited to:
typedef int type __attribute__ ((vector_size (128)));
typedef short type __attribute__ ((vector_size (64)));

and some other -march like icelake-client.

Start with the Godbolt C and LLVM IR reproducer, comparing the -O3 output for src and tgt on the listed vector sizes and -march options. Read the InstCombine and VectorCombine handling of vector icmp results and confirm completion when the equivalent case produces the sext-style result without the extra shift shown in the assembly.

Written by the indexing model from the issue text.