llvm / llvm/llvm-project

[DAG] computeKnownBits - add support for ISD::VECREDUCE_ADD

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#206,289 7 comments 0 reactions 1 assignee Claimed by @sabonaoabdi View on GitHub
good first issue llvm:SelectionDAG
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Description

We already have KnownBits::reduceAdd to handle this (for fixed vector types at least).

We just need the SelectionDAG.computeKnownBits wrapper and suitable test coverage

Contributor guide

Open the contributing guide

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