AMDGPU/GlobalISel: use fewer store instructions
Open
backend:AMDGPU
good first issue
llvm:globalisel
- Dominant language
- LLVM
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Description
```llvm
define amdgpu_ps void @store_v3i16(<3 x i16> %in, ptr addrspace(1) %out) {
store <3 x i16> %in, ptr addrspace(1) %out, align 4
ret void
}
llc -mtriple=amdgcn-- -mcpu=gfx1200 -global-isel
```
sdag is more efficient and uses different size stores
```asm
global_store_b16 v[2:3], v1, off offset:4
global_store_b32 v[2:3], v0, off
```
gisel just does simple split to smallest legal store
```asm
global_store_b16 v[2:3], v0, off
global_store_d16_hi_b16 v[2:3], v0, off offset:2
global_store_b16 v[2:3], v1, off offset:4
```
most probably can be fixed in legalizerinfo
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