[X86]Enable ordered reductions support
Open
backend:X86
llvm:codegen
- Dominant language
- LLVM
- Stars
- 40.5k
- Forks
- 18.7k
- PR merge metrics
- PR metrics pending
Description
Need to consider enabling the ordered reductions on X86. Currently, they are disabled completely, making not possible to vectorize some profitable trees, even if it is theoretically profitable with the whole set of extractelements+scalar operations. This may prevent LV from vectorizing some code
Contributor guide
Research direction
Start by locating the X86 handling for ordered reductions and the loop vectorizer (LV) paths that currently disable them. Review existing reduction-related tests, if present, and determine how to demonstrate that profitable trees can be vectorized with ordered reductions enabled. Done means the relevant X86 cases are supported and covered by tests.
Written by the indexing model from the issue text.
Assessment
- Domain
- compilers
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Quiet
- Clarity
- Needs clarification
- Newbie friendliness
- 35/100