[X86][AVX512][AArch64][SVE] failed to lower non-pow2 load/store to pow2-upward masked load/store

https://avx512.godbolt.org/z/nKd96ro36

define void @load_store_nonpow2(ptr %0, ptr %1) {
  %3 = load <15 x i32>, ptr %0
  store <15 x i32> %3, ptr %1
  ret void
}

define void @load_store_nonpow2_masked_pow2(ptr %0, ptr %1) {
  %3 =  tail call <16 x i32> @llvm.masked.load.v16i32.p0(ptr %0, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false>, <16 x i32> poison)
  tail call void @llvm.masked.store.v16i32.p0(<16 x i32> %3 , ptr %1, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false>)
  ret void
}

load_store_nonpow2:
        mov     eax, dword ptr [rdi + 56]
        mov     rcx, qword ptr [rdi + 48]
        vmovaps ymm0, ymmword ptr [rdi]
        vmovaps xmm1, xmmword ptr [rdi + 32]
        vmovaps xmmword ptr [rsi + 32], xmm1
        vmovaps ymmword ptr [rsi], ymm0
        mov     qword ptr [rsi + 48], rcx
        mov     dword ptr [rsi + 56], eax
        vzeroupper
        ret

load_store_nonpow2_masked_pow2:
        mov     ax, 32767
        kmovd   k1, eax
        vmovdqu32       zmm0 {k1} {z}, zmmword ptr [rdi]
        vmovdqu32       zmmword ptr [rsi] {k1}, zmm0
        vzeroupper
        ret

define void @load_store_nonpow2(ptr %0, ptr %1) {
  %3 = load <15 x i8>, ptr %0
  store <15 x i8> %3, ptr %1
  ret void
}

define void @load_store_nonpow2_masked_pow2(ptr %0, ptr %1) {
  %3 =  tail call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %0, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false>, <16 x i8> poison)
  tail call void @llvm.masked.store.v16i8.p0(<16 x i8> %3 , ptr %1, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false>)
  ret void
}

load_store_nonpow2:
  vmovdqa xmm0, xmmword ptr [rdi]
  vpextrb byte ptr [rsi + 14], xmm0, 14
  vpextrw word ptr [rsi + 12], xmm0, 6
  vpextrd dword ptr [rsi + 8], xmm0, 2
  vmovq qword ptr [rsi], xmm0
  ret

load_store_nonpow2_masked_pow2:
  mov ax, 32767
  kmovd k1, eax
  vmovdqu8 xmm0 {k1} {z}, xmmword ptr [rdi]
  vmovdqu8 xmmword ptr [rsi] {k1}, xmm0
  ret

Backend should be able to transform the first function to be similar like the second function.

see https://github.com/llvm/llvm-project/pull/204893#issuecomment-4761828244

Start with the Godbolt reproducer and compare the LLVM IR and generated assembly for the non-power-of-two load/store on x86 AVX512 and AArch64 SVE. Trace the backend lowering responsible for the first function and verify that its output becomes equivalent to the shown power-of-two masked load/store sequence.