llvm / llvm/llvm-project

[DebugLoc][Reg-Spiller] Should Spill instructions inherit DebugLoc from their def instruction rather than forward-scanning?

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debuginfo llvm:regalloc
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Description

Currently, when the register allocator inserts spill instructions, there is no consistent policy for assigning their DebugLoc. In practice, spill code either ends up with an empty DebugLoc, or uses a forward-scanned location via `findDebugLoc()` logic.

**My question/concern is:** the most appropriate DebugLoc for a spill instruction is inheriting the instruction that defines the register being spilled — i.e., the def instruction immediately preceding the spill, which should use `rfindDebugLoc()` to search. However, no backend in LLVM adopt this method.

For example, here is the debug loc setting following the current fasion:
```
.loc 0 39 10 # control_flow_spill_debugloc.cu:39:10
add.s32 r2 = r2, 119, r0;
.loc 0 40 10 # control_flow_spill_debugloc.cu:40:10
st.local [r1 + 0], r2; # 4-byte Folded Spill
setp p0 = r0, r1;
```

However, I think it can be better if `st.local [r1 + 0], r2;` can use the previous instruction's DebugLoc, i.e. `.loc 0 39 10`.


I have investigated on different backend, there is no unified behavior for every backends unfortunately:

mode | backend | note
-- | -- | --
DebugLoc() | X86、AArch64、AVR | setting an empty DebugLoc for them
I != end ? I->getDebugLoc() : DebugLoc() | ARM/Thumb1/Thumb2、SystemZ、Sparc、LoongArch、PowerPC、Mips、BPF、CSKY、MSP430、Lanai、Xtensa、VE、XCore | inherit Insert point's DebugLoc first, if not, setting an empty
MBB.findDebugLoc(I) | AMDGPU、Hexagon、ARC、M68k | skip debug instruction, and inherit

I wonder is there a convention of setting spill's DebugLoc according to LLVM suggestion? Or do we think this is too trivial to concern about? Thanks a lot in advance!

Contributor guide

Open the contributing guide

Research direction

Start by reviewing the register allocator's spill-instruction insertion paths and the existing findDebugLoc() and rfindDebugLoc() logic. Compare the backend behaviors listed in the issue, then determine whether LLVM wants a unified convention for inheriting a spilled register's defining instruction location; done means the convention and affected backend changes are agreed.

Written by the indexing model from the issue text.

Assessment

Domain
compilers
Issue type
Feature
Difficulty
5/5
Estimated time
Over a week
Activity status
Quiet
Clarity
Needs clarification
Newbie friendliness
35/100

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