[MIR] Why does `constrainRegClass` not consider whether `NewRC` is allocatable?

```
static const TargetRegisterClass *
constrainRegClass(MachineRegisterInfo &MRI, Register Reg,
const TargetRegisterClass *OldRC,
const TargetRegisterClass *RC, unsigned MinNumRegs) {
if (OldRC == RC)
return RC;
const TargetRegisterClass *NewRC =
MRI.getTargetRegisterInfo()->getCommonSubClass(OldRC, RC);
if (!NewRC || NewRC == OldRC)
return NewRC;
if (NewRC->getNumRegs() < MinNumRegs)
return nullptr;
MRI.setRegClass(Reg, NewRC);
return NewRC;
}
```

```
#1 llvm::MachineRegisterInfo::setRegClass at lllvm/lib/CodeGen/MachineRegisterInfo.cpp:59
#2 0x0000000005e812cd in constrainRegClass at llvm/lib/CodeGen/MachineRegisterInfo.cpp:80
#3 0x0000000005e81334 in llvm::MachineRegisterInfo::constrainRegClass at llvm/lib/CodeGen/MachineRegisterInfo.cpp:88
```

If NewRC is non-allocable, an assertion failure is triggered within `setRegClass`.
assert(RC && RC->isAllocatable() && "Invalid RC for virtual register");