[X86][GlobalISel] Support FP LLT types

There are three reasons to enable extended types for X86 backend

1. There is a problem of understanding whether we need to use SSE/X87/GPR register for instruction selection. It was solved by AArch64's approach using def-use chains in #87453. Def-use analysis needs constant update and complicated the register bank assignment.

2. For 32 bit selection we have tricky situations with floats: we do have 32/64/80 bit float loads using X87 but we don't have 64 bit loads for GPR. Currently we create coverage only after legalizer, because legalizer can't determine whether it is a load for a float operation or for an integer one.
* llvm/test/CodeGen/X86/GlobalISel/isel-fcmp-i686.mir
* llvm/test/CodeGen/X86/GlobalISel/isel-fp64-to-sint-x86.mir
* llvm/test/CodeGen/X86/GlobalISel/isel-sint-to-fp64-x86.mir
* llvm/test/CodeGen/X86/GlobalISel/llvm.sincos.mir
* llvm/test/CodeGen/X86/GlobalISel/sqrt.mir

3. There is a need to distinguish shuffles during selection to choose the correct domain.

The plan is to
1. Bring up local tests and merge the updated tests gradually. MIR parser should work with extended types among input if they are disabled on the target
2. Enable extended LLT types
3. Drop Def-Use approach from `X86RegisterBankInfo` (I'm not sure here, should we want to keep both variations, most likely not)
4. Enable tests for the 32 bit target that couldn't be legalized.