llvm / llvm/llvm-project

Reduce permission interleaving in default JIT memory layout

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#191,727 1 comment 0 reactions 0 assignees View on GitHub
orcjit
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LLVM
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Description

The current (as of April 2026) in-tree `JITLinkMemoryManager` implementations allocate "segments" (permission-grouped bits) sequentially, so in a JIT session with many objects the memory layout will look something like:
```
|R--|R-X|R-W|R--|R-X|RW-|R--|R-X|RW-|...
\_________/ \_________/ \_________/
Object #1 Object #2 Object #3
```
This interleaving of permissions is bad for page table sizes and performance. What we really want is something like:
```
|R--|R--|R--|R--|....|R-X|R-X|R-X|R-X|...|RW-|RW-|RW-|RW-|...
\__________________/ \_________________/ \_________________/
RO: 1,2,3,... RX: 1,2,3,... RW: 1,2,3,...
```
We don't know exactly how much `R--` / `RW-` / `R-X` memory we'll need up front, so we can't pre-assign these ranges exactly, but there's a couple of compromises we could make:

1. Reserve chunks of a given size for each permission and just stripe the chunks, allocating segments out of available chunks where possible and allocating a new chunk otherwise. For a 2Gb reserved range (assuming that it's aligned) and 4Mb chunks that'd mean at most 512 different mappings.

2. Hybrid scheme: Allocate data from the top of the reserved range, text (`R-X`) from the bottom, with striped chunks for data (to distinguish `R--` / `R-W`). This would minimize the distinct page table entries needed for text, and if either RO or RW data dominate (probably the common case). then it should keep the entries needed for data low too.

Contributor guide

Open the contributing guide

Research direction

Start by reading the in-tree JITLinkMemoryManager implementations and how they allocate permission-grouped segments. Compare the proposed chunk-striped and hybrid layouts, then define a design that reduces permission interleaving without requiring exact upfront sizes; done means the chosen layout and its trade-offs are implemented and validated.

Written by the indexing model from the issue text.

Assessment

Domain
compilers
Issue type
Feature
Difficulty
5/5
Estimated time
Over a week
Activity status
Quiet
Clarity
Mostly clear
Newbie friendliness
35/100

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