Potential to use ldp/stp over multiple ldr/str's

https://godbolt.org/z/xd114jWGj
```c++
#include

struct PolicyStorage {
char buf[16];
};

struct PolicyFunc {
PolicyStorage buf;
void (*func)();
const void* policy;
};

void swap_custom(PolicyFunc& a, PolicyFunc& b) {
std::swap(a.func, b.func);
std::swap(a.policy, b.policy);
}
```

When compiled with `-target aarch64-linux-gnu -Oz` (and `-Os`) will produce

```asm
_Z11swap_customR10PolicyFuncS0_: // @_Z11swap_customR10PolicyFuncS0_
.cfi_startproc
// %bb.0:
ldr x8, [x1, #16]
ldr x9, [x0, #16]
str x8, [x0, #16]
str x9, [x1, #16]
ldr x8, [x1, #24]
ldr x9, [x0, #24]
str x8, [x0, #24]
str x9, [x1, #24]
ret
```

For getting maximal size savings though I think it should be possible to do

```asm
_Z11swap_customR10PolicyFuncS0_:
ldp x8, x9, [x1, #16]
ldp x10, x11, [x0, #16]
stp x8, x9, [x0, #16]
stp x10, x11, [x1, #16]
```

at the cost of 2 extra registers used. It could be for more complex functions, the higher register pressure could lead to more text via spilling/reloading, but it's probably worth keeping track of here.

Start with the C++ example and Godbolt link, compiling for AArch64 with -Oz and -Os. Inspect the generated assembly around swap_custom and investigate whether the adjacent ldr/str operations can use ldp/stp while accounting for the extra register pressure. Done means the relevant size-optimized output uses paired operations where beneficial and remains correct.

Written by the indexing model from the issue text.