[RISC-V] Missed Zilsd opportunity in lmbench

The fcp() function in lmbench is a perfect match for Zilsd.
However, llvm (and neither gcc) generate ld/sd on rv32.

This is the function:
https://sourceforge.net/p/lmbench/code/HEAD/tree/trunk/lmbench3/src/bw_mem.c#l374

This is a simpler reproducer:
https://godbolt.org/z/YMGqTbnGa

Start with the fcp() function in lmbench3/src/bw_mem.c around line 374 and reproduce the rv32 case using the linked Compiler Explorer example. Inspect the generated code for the Zilsd opportunity and trace the relevant LLVM compiler path. Done means LLVM emits the expected ld/sd instructions for this case.

Written by the indexing model from the issue text.