[Vulkan][Clang] WaveActiveBitXor / Or functions hit assertion when preceding a loop intrinsic
- Dominant language
- LLVM
- Stars
- 40.5k
- Forks
- 18.7k
- PR merge metrics
- PR metrics pending
Description
```Loop intrinsic cannot be preceded by a convergent operation in the same basic block.```
This diagnostic is seen for this HLSL shader:
```hlsl
StructuredBuffer In : register(t0);
RWStructuredBuffer Out1 : register(u1); // branch A
RWStructuredBuffer Out2 : register(u2); // branch B
RWStructuredBuffer Out3 : register(u3); // reconverged
RWStructuredBuffer Out4 : register(u4); // loop
[numthreads(4,1,1)]
void main(uint3 tid : SV_GroupThreadID)
{
uint4 v = In[tid.x];
// divergent branch
if (tid.x < 2)
Out1[tid.x] = WaveActiveBitXor(v.x);
else
Out2[tid.x] = WaveActiveBitXor(v.x);
// reconverged wave op
Out3[tid.x] = WaveActiveBitXor(v.x);
// loop case
uint r = v.x;
for (uint i = 0; i < 2; i++)
r = WaveActiveBitXor(r);
Out4[tid.x] = r;
}
```
We expect this to compile. But instead we hit an assert.
We need to understand whether this assertion is valid for the generated SPIRV, and allow this through, since this does compile when targeting DXIL.
Contributor guide
Assessment
This issue has not been assessed yet.