[RISCV] add new relocation type for gp

Currently, the RISC-V architecture addresses constant subscript elements of global arrays using `lui` + `ld/st`, and non-constant subscript elements using `lui` + `addi` + `add` + `ld/st`. The low-address calculation process of addi is decomposed into ld/st, thereby eliminating low-address calculation and reducing addressing instructions.
C code test like
```
__attribute__((noinline)) char
ld_char (int i)
{
return arr1[i];
}

__attribute__((noinline)) char
ld_char_u (unsigned int i)
{
return arr1[i];
}

__attribute__((noinline)) short
ld_short (int i)
{
return arr2[i];
}

__attribute__((noinline)) short
ld_short_u (unsigned int i)
{
return arr2[i];
}

```
1) Without GP relaxation
lui + addi + add/shxadd + ld/st ----Transform ---- lui + add/shxadd + ld/st

2) With GP relaxation
addi + add + ld/st ------ Transform ----- add + ld/st

As shown in the diagram above, I need to update the `add` and `ld/st` instructions. Therefore, I need to add a new relocation type for this scenario to ensure that it is reprocessed during the linking phase. As like:
```
lui vr1, %hi(sym)
addi vr1, vr1, %lo(sym)
add vr2, vrx, vr1
lbu vr3, off(vr2)

-----Transform-----

lui vr1, %hi(sym+off)
add vr2, vrx, vr1, %gprel_add(sym+off)
lbu vr3, %gprel_lo(sym+off)(vr2)
```
My implement MR ： https://github.com/llvm/llvm-project/pull/185353