llvm / llvm/llvm-project

[AMDGPU] Add Serialized Handles For All Kernel Descriptor Fields in `SIMachineFunctionInfo`

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backend:AMDGPU
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LLVM
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Description

There are a few fields in AMD HSA's kernel descriptor that don't have a high-level handle in the `SIMachineFunctionInfo` and are only controllable through assembler directives. More specifically, in the following code that I wrote to create a new `Function`/`MachineFunction` handle by parsing a kernel descriptor, the fields that I've designated as "fixed after the assembly is printed" don't have a way to be controlled in the `SIMachineFunctionInfo`:
https://github.com/matinraayai/Luthier/blob/12abda43c676fd284239b2e96dd59eed955efce1/src/lib/ToolingCommon/CodeDiscoveryPass.cpp#L113-L396

It would be great if all fields in the KD have a direct handle in `SIMachineFunctionInfo` to be set. If there are cases the AMDGPU backend doesn't want to provide that handle in the `SIMachineFunctionInfo`, I can indeed fixup the kernel descriptor once I re-print the assembly.

Contributor guide

Open the contributing guide

Research direction

Start with SIMachineFunctionInfo and the AMD HSA kernel descriptor, then compare the descriptor fields with the handles currently exposed there. Use the linked CodeDiscoveryPass.cpp example as context for fields marked fixed after assembly printing. Done means every kernel-descriptor field has a direct high-level handle, or the remaining exceptions are explicitly identified for post-print fixup.

Written by the indexing model from the issue text.

Assessment

Domain
compilers
Issue type
Feature
Difficulty
5/5
Estimated time
Over a week
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
30/100

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