[AMDGPU] Split `OPERAND_REG_IMM_INT64` into signed and unsigned

`OPERAND_REG_IMM_INT64` currently represents `b64`, `i64`, and `u64` operands. This wasn't a problem until newer targets started to support `src_literal64` encoding. We can't tell whether a literal is signed or unsigned, so for negative values we don't know its signedness. Because of that, we have to conservatively force `src_literal64` encoding, which isn't always the best choice.

We should split this into `OPERAND_REG_IMM_B64` and `OPERAND_REG_IMM_INT64`. The `B64` one would represent the unsigned case, and the `INT64` one would represent the signed case. Then we can safely use `IsUInt<32>` and `IsInt<32>` to decide whether `src_literal64` is needed.

Start by locating OPERAND_REG_IMM_INT64 and the AMDGPU handling of src_literal64, then trace all uses that distinguish b64, i64, and u64 operands. Done means the representation is split into OPERAND_REG_IMM_B64 and OPERAND_REG_IMM_INT64, with the signedness predicates selecting src_literal64 only when needed.

Written by the indexing model from the issue text.