llvm / llvm/llvm-project

select(fcmp nnan one, ...) optimization does not trigger when RHS is 0

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llvm:instcombine missed-optimization
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LLVM
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Description

I observed that in LLVM, the pattern:

define float @src(float %x) {
  %fcmp = fcmp nnan one float %x, 6.0
  %fsub = fsub float %x, 2.0
  %sel = select i1 %fcmp, float 2.0, float %fsub
  ret float %sel
}

can be optimized to:

define float @tgt(float %x) {
  %fcmp = fcmp nnan one float %x, 6.000000e+00
  %sel = select i1 %fcmp, float 2.000000e+00, float 4.000000e+00
  ret float %sel
}

However, when the right-hand side of the fcmp is 0, this optimization does not happen

define float @src(float %x) {
  %fcmp = fcmp nnan one float %x, 0.0
  %fsub = fsub float %x, 2.0
  %sel = select i1 %fcmp, float 2.0, float %fsub
  ret float %sel
}

This src will not be optimized to the following tgt

define float @tgt(float %x) {
  %fcmp = fcmp nnan one float %x, 0.000000e+00
  %sel = select i1 %fcmp, float 2.000000e+00, float -2.000000e+00
  ret float %sel
}

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First steps

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  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by running the provided @src LLVM IR through the relevant optimization pipeline and compare it with the @tgt form shown for the RHS value 6.0. Trace the fcmp/select optimization and verify that the same expected constant-folding result is produced when the comparison RHS is 0.0.

Written by the indexing model from the issue text.

Assessment

Domain
compilers
Issue type
Bug
Difficulty
3/5
Estimated time
1-2 days
Activity status
Quiet
Clarity
Mostly clear
Newbie friendliness
48/100

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