aarch64: LLVM makes use of floating-point registers even with -mgeneral-regs-only in some cases

For a C++ program like this:
```c++
[[clang::preserve_none]] void foo();
void bar() {
foo();
}
```

LLVM on aarch64 saves d8..d15 even with `-mgeneral-regs-only`, `-msoft-float`, and `-march=armv8+nofp+nosimd`. I would expect either an error or codegen that does not make use of floating-point registers.

Generated assembly, for reference:
```asm
bar():
stp d15, d14, [sp, #-160]!
stp d13, d12, [sp, #16]
stp d11, d10, [sp, #32]
stp d9, d8, [sp, #48]
stp x29, x30, [sp, #64]
stp x28, x27, [sp, #80]
stp x26, x25, [sp, #96]
stp x24, x23, [sp, #112]
stp x22, x21, [sp, #128]
stp x20, x19, [sp, #144]
add x29, sp, #64
bl foo()
ldp x20, x19, [sp, #144]
ldp x22, x21, [sp, #128]
ldp x24, x23, [sp, #112]
ldp x26, x25, [sp, #96]
ldp x28, x27, [sp, #80]
ldp x29, x30, [sp, #64]
ldp d9, d8, [sp, #48]
ldp d11, d10, [sp, #32]
ldp d13, d12, [sp, #16]
ldp d15, d14, [sp], #160
ret
```

[compiler explorer](https://godbolt.org/z/7osT7b1vT)