Wasm SIMD shuffle "don't care" that maps efficiently to SSE and NEON?
- Dominant language
- LLVM
- Stars
- 40.5k
- Forks
- 18.7k
- PR merge metrics
- PR metrics pending
Description
When doing WebAssembly SIMD `wasm_i32x4_shuffle()`s (using i32x4 as an example), the developer is pressured to concern themselves about efficient lowering to SSE and NEON; given that Wasm SIMD is a pseudo SIMD API after all.
Sometimes in shuffles I have some amount of flexibility/freedom to pick arbitrary shuffle patterns.
Does there exist a mechanism, where the programmer could declare a "don't care" shuffle lane?
Then the WebAssembly backend could pick the most optimal value, that it knows will lower the best to the fewest SSE and NEON shuffle instructions sequence. (e.g. a shufps or an unpack?)
Contributor guide
Research direction
No files or tests are named. Start at the WebAssembly SIMD wasm_i32x4_shuffle entry point and investigate how shuffle patterns lower to SSE and NEON. Done would require determining whether a don't-care lane mechanism is feasible and defining the required behavior or design.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- wasm
- Domain
- compilers
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100