RISC-V/NO_ZFA: switch FMAXIMUM of f32/f64 to Expand

https://github.com/llvm/llvm-project/pull/137367

If this PR is merged, we can switch FMAXIMUM of f32/f64 to Expand, which will get some better performace:

```
f: # @f
# %bb.0: # %entry
feq.d a0, fa0, fa0
fmv.d fa5, fa1
beqz a0, .LBB0_3
# %bb.1: # %entry
feq.d a0, fa1, fa1
beqz a0, .LBB0_4
.LBB0_2: # %entry
fmin.d fa0, fa0, fa5
ret
.LBB0_3: # %entry
fmv.d fa5, fa0
feq.d a0, fa1, fa1
bnez a0, .LBB0_2
.LBB0_4: # %entry
fmin.d fa0, fa1, fa5
ret
```

vs

```
f: # @f
# %bb.0: # %entry
feq.d a0, fa1, fa1
feq.d a1, fa0, fa0
and a0, a1, a0
beqz a0, .LBB0_2
# %bb.1: # %entry
fmin.d fa0, fa0, fa1
ret
.LBB0_2:
lui a0, 4095
slli a0, a0, 39
fmv.d.x fa0, a0
ret
```