[x86-64] Allow branching on shl/shr setting zero flag

[Zig Godbolt](https://zig.godbo.lt/#g:!((g:!((g:!((h:codeEditor,i:(filename:'1',fontScale:14,fontUsePx:'0',j:1,lang:zig,selection:(endColumn:2,endLineNumber:3,positionColumn:2,positionLineNumber:3,selectionStartColumn:1,selectionStartLineNumber:1,startColumn:1,startLineNumber:1),source:'export+fn+shl_test(x:+u64,+_:+u8,+_:+u8,+y:+u8)+bool+%7B%0A++++return+0+%3D%3D+x+%3C%3C+@truncate(y)%3B%0A%7D'),l:'5',n:'0',o:'Zig+source+%231',t:'0')),k:100.00000000000001,l:'4',m:50,n:'0',o:'',s:0,t:'0'),(g:!((h:compiler,i:(compiler:ztrunk,filters:(b:'0',binary:'1',binaryObject:'1',commentOnly:'0',debugCalls:'1',demangle:'0',directives:'0',execute:'1',intel:'0',libraryCode:'0',trim:'1',verboseDemangling:'0'),flagsViewOpen:'1',fontScale:14,fontUsePx:'0',j:2,lang:zig,libs:!(),options:'-O+ReleaseFast+-target+x86_64-linux+-mcpu%3Dicelake_server-bmi2+-fomit-frame-pointer',overrides:!(),selection:(endColumn:12,endLineNumber:5,positionColumn:12,positionLineNumber:5,selectionStartColumn:1,selectionStartLineNumber:1,startColumn:1,startLineNumber:1),source:1),l:'5',n:'0',o:'+zig+trunk+(Editor+%231)',t:'0')),header:(),l:'4',m:50,n:'0',o:'',s:0,t:'0')),l:'3',n:'0',o:'',t:'0')),version:4)

```zig
export fn shl_test(x: u64, _: u8, _: u8, y: u8) bool {
return 0 == x << @truncate(y);
}
```

```diff
shl_test:
shl rdi, cl
- test rdi, rdi
sete al
ret
```

Start with the Zig Godbolt example and its x86-64 ReleaseFast assembly, focusing on the shl instruction followed by sete. Compare the shown output with the requested zero-flag branching behavior, then identify the relevant LLVM x86-64 backend tests or entry points. Done means the generated sequence handles the zero flag without the extra test instruction.

Written by the indexing model from the issue text.