llvm / llvm/llvm-project

AMDGPU should implement TargetInstrInfo::isSubregFoldable

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#168,003 2 comments 0 reactions 0 assignees View on GitHub
backend:AMDGPU llvm:regalloc missed-optimization
Dominant language
LLVM
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Description

AMDGPU should implement isSubregFoldable to support folding subregister extracts into spills. This will need supported code in foldMemoryOperandImpl to rewrite the spill instruction to only sill the subregister

Contributor guide

Open the contributing guide

Research direction

Start by tracing AMDGPU's TargetInstrInfo::isSubregFoldable entry point and the foldMemoryOperandImpl path mentioned in the issue. Compare the existing spill-folding behavior and verify that subregister extracts can be folded into spills, with the spill instruction rewritten to store only the subregister.

Written by the indexing model from the issue text.

Assessment

Domain
compilers
Issue type
Feature
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
35/100

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