Volatile atomicrmw can cause variable number of memory accesses

In cases in which atomicrmw is implemented through a CAS or LL/SC loop, `atomicrmw volatile` may lead to an arbitrary amount of reads from and writes to the specified address: https://llvm.godbolt.org/z/n3axfe1Y5 .

The LangRef states `If the atomicrmw is marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this atomicrmw with other volatile operations.`. It does not however state whether a given volatile operation must emit a fixed number of memory accesses in the output assembly. Still, it seems counterintuitive at best to have a single volatile operation lead to a theoretically unbounded number of operations on the volatile object. Is this the intended behavior? And if yes, would it make sense to document this in the LangRef?