llvm / llvm/llvm-project

[X86] Poor AVX512 codegen with constant predicate

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#164,399 1 comment 1 reaction 0 assignees View on GitHub
backend:X86 missed-optimization
Dominant language
LLVM
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Description

Noticed while reviewing constexpr handling of the predicated arithmetic:
```ll
define <16 x i32> @add(<16 x i32> %x, <16 x i32> %y) {
%add = add <16 x i32> %y, %x
%res = shufflevector <16 x i32> %add, <16 x i32> zeroinitializer, <16 x i32>
ret <16 x i32> %res
}
```
```asm
add: # @add
vpaddd %zmm0, %zmm1, %zmm0
movw $255, %ax
kmovd %eax, %k1
vpexpandd %zmm0, %zmm0 {%k1} {z}
retq
```
Lots of things going wrong here:
1. Lowering the shuffle as an expansion instead of a select (which would fold into a predicated instruction)
2. Use of movw/kmovd instead of kxnorb to rematerialize the 0xFF predicate mask directly
3. Zeroing upper 256-bits of the vector - so this could have just been done as `vpaddd %ymm0, %ymm1, %ymm0` for implicit zeroing

Contributor guide

Open the contributing guide

Research direction

Start by reproducing the provided LLVM IR through the x86 AVX512 code-generation path and compare the generated assembly with the issue's example. The work is done when the shuffle is lowered as a selectable predicate, the constant mask is rematerialized efficiently, and upper-vector zeroing is avoided where implicit zeroing suffices.

Written by the indexing model from the issue text.

Assessment

Domain
compilers, performance
Issue type
Bug
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
38/100

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